Patent classifications
H03M1/1076
Motor control system and method for detecting abnormality in resolver/digital converter
A motor control system includes a motor, a resolver configured to detect a rotation angle of the motor, a resolver/digital converter configured to convert an analog angle signal output from the resolver into a digital angle signal, and a motor control unit configured to control the motor based on the digital angle signal output from the resolver/digital converter and determine, when an integrated value obtained by integrating the digital angle signal at a predetermined time interval is not within a threshold range, that the resolver/digital converter is abnormal. The motor control unit increases the time interval for the integration when a rotation speed of the motor decreases and decreases the time interval for the integration when the rotation speed of the motor increases.
System for acquisition of at least one physical variable, in particular for a critical on-board avionics system, and associated acquisition method
The present invention relates to a system for acquisition of at least one physical variable, in particular for a critical on-board avionics system, comprising a sensor for measuring the physical variable; an acquisition channel receiving an analog signal corresponding to the physical variable measured by the sensor and transforming this analog signal into a corresponding digital signal, at least some of these transformations being able to be carried out with loss of accuracy; self-test unit for checking the integrity of the acquisition channel and generating a self-test result. The system further comprises an analyzer analyzing the self-test result in order to determine an operating mode of the acquisition channel, and for activating the operation of means for correcting the signal delivered by the channel.
Sampling clock generating circuit and analog to digital converter
A sampling clock generating circuit and an analog to digital converter includes a variable resistance circuit, and a NOT-gate type circuit, where an input end of the NOT-gate type circuit receives a pulse signal whose period is T; a power supply terminal of the NOT-gate type circuit is connected to a power supply; a ground terminal of the NOT-gate type circuit is connected to one end of the variable resistance circuit; and the other end of the variable resistance circuit is grounded; the NOT-gate type circuit is configured to: when the pulse signal is a high level, output a low level; and when the pulse signal is a low level, output a high level.
Semiconductor device and failure detection method
The present invention provides a semiconductor device and a failure detection method capable of detecting an excessive variation among elements that constitute an analog circuit as a failure. According to an embodiment, a semiconductor device 1 includes: an AD converter 11; a digital assist circuit 12 that corrects an error of a digital signal Do corresponding to an analog signal Ain processed by the AD converter 11; and a failure detection circuit 13 that detects whether the AD converter 11 has a failure based on a correction amount by the digital assist circuit. The semiconductor device 1 is therefore able to detect the excessive variation among the elements that constitute the AD converter 11 as a failure.
Baseline wander compensator and method
A baseline wander and offset correction system having inputs configured to receive input signals to be transmitted. Also part of the system is a driver circuit configured to receive and amplify the input signals. The driver circuit is configured with one or more transistors having an optional back bias terminal. A replica circuit receives the input signals and responsive thereto, generates back bias signals which are provided to the back bias terminal of the one or more transistors to change the back bias in response to the input signals having consecutive one values or consecutive zero values. This reduces the size of the one or more AC coupling capacitors located between the driver circuit and a channel. An embodiment may store back bias values in a memory. The back bias values are processed by DAC to generate the back bias signals for offset correction.
Failure determination circuit, physical quantity measurement device, electronic apparatus, vehicle, and failure determination method
A failure determination circuit includes a first A/D conversion circuit that continuously A/D converts a first analog signal based on a first physical quantity measurement signal, a switching circuit that receives a plurality of signals including a second analog signal based on the first physical quantity measurement signal and a first reference voltage and outputs the plurality of signals in a time division manner, a second A/D conversion circuit that A/D converts the output of the switching circuit, and a determination circuit, and the determination circuit determines a failure of the first A/D conversion circuit using a signal based on a first digital signal obtained by A/D converting the first analog signal by the first A/D conversion circuit and a signal based on a second digital signal obtained by A/D converting the second analog signal by the second A/D conversion circuit.
Methods and systems of detecting failure modes of DC to DC power converters
Detecting failure modes of DC to DC power converters. In a system comprising a lighting microcontroller communicatively coupled to a direct current (DC) to DC power converter coupled to light-emitting diodes (LEDs) by way of an inductor, an example method may include: commanding, by the lighting microcontroller, the power converter to control an average current provided to the LEDs; reading, by the lighting microcontroller, values from the power converter; and detecting, by the lighting controller, one or more failure modes of the power converter based on the values.
A/D conversion device
A first mode in which to output analog electricity quantities of objects one by one independently to an A/D converter, a second mode in which to output none of the analog electricity quantities of the objects, a third mode in which to output none of the analog electricity quantities of the objects and cause the output to the A/D converter to be resistor, and a fourth mode in which to output to the A/D converter a plurality of the analog electricity quantities of the objects at the same time, are caused to be generated, thus acquiring the A/D conversion values of the objects individually when in the first mode, and detecting an anomaly of the A/D converter itself or a device connected to the A/D converter when in the second mode to the fourth mode.
MOTOR CONTROL SYSTEM AND METHOD FOR DETECTING ABNORMALITY IN RESOLVER/DIGITAL CONVERTER
A motor control system includes a motor, a resolver configured to detect a rotation angle of the motor, a resolver/digital converter configured to convert an analog angle signal output from the resolver into a digital angle signal, and a motor control unit configured to control the motor based on the digital angle signal output from the resolver/digital converter and determine, when an integrated value obtained by integrating the digital angle signal at a predetermined time interval is not within a threshold range, that the resolver/digital converter is abnormal. The motor control unit increases the time interval for the integration when a rotation speed of the motor decreases and decreases the time interval for the integration when the rotation speed of the motor increases.
Failure Determination Circuit, Physical Quantity Measurement Device, Electronic Apparatus, Vehicle, And Failure Determination Method
A failure determination circuit includes a first A/D conversion circuit that continuously A/D converts a first analog signal based on a first physical quantity measurement signal, a switching circuit that receives a plurality of signals including a second analog signal based on the first physical quantity measurement signal and a first reference voltage and outputs the plurality of signals in a time division manner, a second A/D conversion circuit that A/D converts the output of the switching circuit, and a determination circuit, and the determination circuit determines a failure of the first A/D conversion circuit using a signal based on a first digital signal obtained by A/D converting the first analog signal by the first A/D conversion circuit and a signal based on a second digital signal obtained by A/D converting the second analog signal by the second A/D conversion circuit.