An image sensing system includes a pixel array, an analog-to-digital converter circuit, and an average calculator. The analog-to-digital converter circuit converts a first pixel signal to first pixel data and converts a second pixel signal to second pixel data. The average calculator generates a first average bit based on a first bit of the first pixel data and a first bit of the second pixel data during a first time and generates a second average bit based on a second bit of the first pixel data and a second bit of the second pixel data during a second time.

A delay circuit includes a state transition section configured to start state transition based on a trigger signal and output state information indicating the internal state and a transition-state acquisition section configured to latch and hold the state information. The state transition section includes a tapped delay line in which a plurality of delay elements are coupled, a logical circuit configured to generate a third signal based on a first signal based on the trigger signal and a second signal, which is an output signal of the delay element, and a synchronous transition section configured to count an edge of the third signal. The state information is having an output signal of the synchronous transition section and an output signal of the tapped delay line. A humming distance of the state information before and after the state transition is 1. A time from when the internal state transitions from a first internal state to a second internal state until when the internal state transitions to the first internal state again is longer than an interval of a time for updating the state information held by the transition-state acquisition section.

A semiconductor device includes a signal conversion circuit configured to convert a sensing current provided from a sensing element into a sensing voltage; an analog-to-digital converter (ADC) configured to convert the sensing voltage to a digital value; and a driving circuit configured to drive a light emitting element, wherein the ADC generates a digital value corresponding to proximity to an object by performing a primary operation comparing a ramp signal varying with time and the sensing voltage while the light emitting element is not driven and a secondary operation comparing the ramp signal and the sensing voltage while the light emitting element is driven.

A semiconductor device includes a signal conversion circuit configured to convert a sensing current provided from a sensing element into a sensing voltage; an analog-to-digital converter (ADC) configured to convert the sensing voltage to a digital value; and a driving circuit configured to drive a light emitting element, wherein the ADC generates a digital value corresponding to proximity to an object by performing a primary operation comparing a ramp signal varying with time and the sensing voltage while the light emitting element is not driven and a secondary operation comparing the ramp signal and the sensing voltage while the light emitting element is driven.

An analog-to-digital convertor of an integration type, includes: a charging circuit having a capacitor configured to store electric charges based on an input current; a discharging circuit configured to discharge the electric charges stored in the capacitor; and a counting circuit configured to count a charge-discharge count of the capacitor in a first conversion period and in a second conversion period, in order to convert a current value of the input current into a digital value, wherein the first conversion period includes a first pre-charging period and a first counting period, the second conversion period includes a second pre-charging period and a second counting period, and the analog-to-digital convertor further comprises a phase changing circuit configured to change a first phase of an output signal of the charging circuit in the first counting period to a second phase in the second counting period.

An analog-to-digital conversion method, an analog-to-digital converter and an image sensor, are provided. The analog-to-digital conversion method includes a first conversion period and a second conversion period; in the first conversion period and the second conversion period, a first counter and the second counter have different effective clock edges and work in a time-sharing way using the first count clock signal and the second count clock signal respectively; in the second conversion period, count directions of the first counter and the second counter are reversed, and the count results in the first conversion period are used as an initial value of the second conversion period; and the conversion result is output based on the first count result and the second count result.

A semiconductor device using a pass transistor is provided. The semiconductor device includes a first circuit, a second circuit, a plurality of input terminals, and an output terminal. The first circuit includes a plurality of first transistors functioning as pass transistors, and the second circuit includes a plurality of second transistors functioning as pass transistors. Note that the number of the first transistors is larger than the number of the second transistors, a gate of the first transistor is supplied with a first signal, and a gate of the second transistor is supplied with a second signal. The first circuit is supplied with grayscale signals through x input terminals, and the first circuit selects y grayscale signals of the grayscale signals with the first signal. The second circuit is supplied withy (y<x) grayscale signals, the second circuit outputs z (z<y) grayscale signals of they grayscale signals to the output terminal with the second signal.

A memory device includes an array of memory cells, a diode having a threshold voltage that changes with temperature, an analog-to-digital converter (ADC), and a pulse generator. The ADC includes a voltage comparator having a positive terminal coupled with the diode. The ADC further includes a first capacitor coupled between a negative terminal of the voltage comparator and ground, and a second capacitor selectively coupled between the first capacitor and a voltage reference node. The second capacitor has a smaller capacitance than that of the first capacitor. The pulse generator is coupled with the ADC and generates pulses. The pulses cause the first capacitor to connect to the second capacitor and equalize charge between the first capacitor and the second capacitor. An inverted signal of the pulses causes the second capacitor to be coupled with the voltage reference node to pre-charge the first capacitor.

A solid state imaging element according to an embodiment includes: a converter (14) that converts an analog pixel signal read out from a pixel into a bit value, successively for each of a plurality of bits, on the basis of a threshold voltage set according to a conversion history of the bit converted before a target bit; a plurality of voltage generation units (102a and 102b) that each generate a plurality of reference voltages; and a setting unit (12d) that sets the threshold voltage using the reference voltage selected from the reference voltages generated by each of the voltage generation units on the basis of a conversion result.

A pulse generator of an image sensor includes a delay cell including a plurality of transistors arranged in series between a power voltage and a ground, a stabilization capacitor, and a stabilization switch. The power voltage is supplied to a first terminal of a first transistor disposed first among the plurality of transistors, and a gate terminal of the first transistor is connected to a first node. An input voltage is supplied to a gate terminal of an n-th transistor disposed last among the plurality of transistors, and a ground voltage is supplied to a first terminal of the n-th transistor. The stabilization switch is disposed between a reference voltage input terminal providing a reference voltage and the first node. The stabilization switch is turned on by an input bias control signal to supply the reference voltage to the first node.