An image sensor includes a photoelectric conversion unit that photoelectrically converts incident light to generate an electric charge; and an AD conversion unit having a comparison unit that compares a signal caused by an electric charge generated by the photoelectric conversion unit with a reference signal, a first storage unit in a first circuit layer, the first storage unit storing a first signal based on a signal output from the comparison unit, and a second storage unit in a second circuit layer that is stacked on the first circuit layer, the second storage unit storing a second signal based on the signal output from the comparison unit.

In a solid-state image sensor provided with a comparator that compares a reference signal and a pixel signal, the image quality of image data is improved. A voltage divider circuit supplies a divided voltage of an input voltage and a predetermined reference voltage that are input. An input-side differential transistor outputs a drain current corresponding to the gate-source voltage between the divided voltage input to the gate and a predetermined source voltage. An output-side differential transistor outputs a voltage corresponding to the drain current as a result of comparison between the input voltage and the reference voltage. A control transistor reduces the gate-source voltage in a case where the input voltage is out of a predetermined range.

An analogue to digital converter is provided for digital imaging devices, in which a pixel column is sampled by a respective capacitor.

In a reset phase of operation, each pixel in the row under consideration is reset, and an operational amplifier operating in a voltage follower mode is coupled to all the sampling capacitors in parallel to obtain the reset values of the pixels sensors of that row, and the in an imaging phase of operation, the inverting input of the operational amplifier operating in a comparator mode is coupled to each capacitor in turn after activating the respective pixel sensor, while exposing the non inverting signal to an analog ramp reference voltage so that the timing of the toggling of the operational amplifier reflects the value of the pixel under consideration, corrected for the reset value.

In some embodiments, a circuit includes a first amplifier, a second amplifier, and a counter. The first amplifier operates based on a first power supply voltage and generates a first output signal by comparing a ramp signal and a reset signal of a pixel signal output from a pixel array during a first operation period and comparing the ramp signal and an image signal of the pixel signal output from the pixel array during a second operation period. The second amplifier operates based on the first power supply voltage, generates a second output signal based on the first output signal and adjust a voltage level of the second output signal from a low level to a third level. The counter operates based on a second power supply voltage, counts pulses of the second output signal, and outputs a counting result as a digital signal.

An analog-to-digital conversion circuit includes a convertor configured to perform a first comparison operation for sensing a noise based on a reset signal and to perform a second comparison operation for sensing raw data to output data which is obtained by removing the noise from the raw data, and a ramp voltage generator configured to generate a ramp voltage used for the first comparison operation and the second comparison operation and to output the ramp voltage to the convertor. The ramp voltage generator includes a first current source for supplying a bias current for generating the ramp voltage in response to a first control signal, a second current source for supplying a boost current for generating the ramp voltage in response to a second control signal, and a generation circuit for generating the ramp voltage based on the bias current and the boost current.

An analog-to-digital conversion circuit includes a convertor configured to perform a first comparison operation for sensing a noise based on a reset signal and to perform a second comparison operation for sensing raw data to output data which is obtained by removing the noise from the raw data, and a ramp voltage generator configured to generate a ramp voltage used for the first comparison operation and the second comparison operation and to output the ramp voltage to the convertor. The ramp voltage generator includes a first current source for supplying a bias current for generating the ramp voltage in response to a first control signal, a second current source for supplying a boost current for generating the ramp voltage in response to a second control signal, and a generation circuit for generating the ramp voltage based on the bias current and the boost current.

A solid-state imaging device includes: a pixel unit that outputs a pixel signal corresponding to an amount of incident light; an A/D converter that performs A/D conversion on the pixel signal; and a D/A conversion circuit that generates a reference signal to be used by the A/D converter. The D/A conversion circuit includes a first buffer circuit that outputs a base voltage VTOP for generating the reference signal, and the first buffer circuit includes a differential pair circuit including a first transistor and a second transistor, and a suppression circuit that suppresses a variation in the base voltage by canceling out a characteristic difference between the first transistor and the second transistor.

An analog-to-digital converting circuit includes: an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array; a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and an auto-zero controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel for which a readout operation is performed by the analog-to-digital converter.

An analog-to-digital converting circuit includes: an analog-to-digital converter suitable for performing an analog-to-digital conversion on pixel signals of a plurality of pixels provided in a pixel array; a ramp signal generator suitable for providing a ramp signal to the analog-to-digital converter; and an auto-zero controller suitable for providing a reference voltage to the analog-to-digital converter to perform an auto-zeroing operation by using a row pixel for which a readout operation is performed by the analog-to-digital converter.

A disclosed comparator includes a comparison circuit including a differential unit that compares an input signal with a reference signal and changes a level of a signal output to a first node in accordance with a result of comparison and an amplifier unit that includes a load element and outputs a signal in accordance with a potential of the first node to a second node, and a positive feedback circuit that is connected to the second node and a third node and changes a level of a signal at the third node at a rate higher than a change rate of a level of a signal at the second node in accordance with a change in a level of a signal at the second node.