An audio transmitter processor for generating an error protected frame using encoded audio data of an audio frame, the encoded audio data for the audio frame having a first amount of information units and a second amount of information units, has: a frame builder for building a codeword frame having a codeword raster, wherein the frame builder is configured to determine a border between a first amount of information units and a second amount of information units so that a starting information unit of the second amount of information units coincides with a codeword border; and an error protection coder to obtain a plurality of processed codewords representing the error protected frame.

An apparatus for generating encoded data includes processing circuitry configured to encode data using a Mojette transform (MT) based on generating encoded representations of data blocks. Generating the encoded representations of data blocks includes reading data in the form of a data block formatted according to specified settings to comprise rows and columns, creating a set of projections, and outputting the created set of projections to enable storage of the data in the form of the set of projections. The apparatus then transmits the encoded data over a network to another device. Additionally, creating the set of projections includes applying the Mojette transform on the data block, and creating a first number of projections based on mapping each row of the data block to a corresponding projection, wherein the first number of projections carries the same information as a corresponding row.

Systems, apparatuses, and methods for generating error correction codes (ECCs) with two check symbols are disclosed. In one embodiment, a system receives a data word of length N2 symbols, wherein N is a positive integer greater than 2, wherein each symbol has m bits, and wherein m is positive integer. The system generates a code word of length N symbols from the data word in accordance with a linear code defined by a parity check matrix. The parity check matrix is generated based on powers of , wherein is equal to raised to the (2.sup.m/41) power, is equal to a raised to the (2.sup.m/2+1) power, and is a primitive element of GF(2.sup.m). In another embodiment, the system receives a (N, N2) code word and decodes the code word by generating a syndrome S from the code word using the parity check matrix.

Systems, apparatuses, and methods for generating error correction codes (ECCs) with two check symbols are disclosed. In one embodiment, a system receives a data word of length N2 symbols, wherein N is a positive integer greater than 2, wherein each symbol has m bits, and wherein m is positive integer. The system generates a code word of length N symbols from the data word in accordance with a linear code defined by a parity check matrix. The parity check matrix is generated based on powers of , wherein is equal to raised to the (2.sup.m/41) power, is equal to a raised to the (2.sup.m/2+1) power, and is a primitive element of GF(2.sup.m). In another embodiment, the system receives a (N, N2) code word and decodes the code word by generating a syndrome S from the code word using the parity check matrix.

An error checking and correcting (ECC) decoder is provided to perform a BCH decoding to decode codeword into decoded data. The ECC decoder includes a syndrome generator circuit, an error locator polynomial circuit, and a decoding circuit. The syndrome generator circuit generates a plurality of syndromes corresponding to the codeword. The error locator polynomial circuit performs an arithmetic operation by using the syndromes to generate a plurality of coefficients in an error locator polynomial. The arithmetic operation includes a plurality of operators, wherein at least one of the operators is a lookup table circuit. The decoding circuit obtains at least one solution to the error locator polynomial with the coefficients and corrects the codeword according to the solution to the error locator polynomial to generate the decoded data.

An error checking and correcting (ECC) decoder is provided to perform a BCH decoding to decode codeword into decoded data. The ECC decoder includes a syndrome generator circuit, an error locator polynomial circuit, and a decoding circuit. The syndrome generator circuit generates a plurality of syndromes corresponding to the codeword. The error locator polynomial circuit performs an arithmetic operation by using the syndromes to generate a plurality of coefficients in an error locator polynomial. The arithmetic operation includes a plurality of operators, wherein at least one of the operators is a lookup table circuit. The decoding circuit obtains at least one solution to the error locator polynomial with the coefficients and corrects the codeword according to the solution to the error locator polynomial to generate the decoded data.

FIG. 1 illustrates a decoder for decoding a current frame to reconstruct an audio signal according to an embodiment. The audio signal is encoded within the current frame. The current frame includes a current bitstream payload. The current bitstream payload includes a plurality of payload bits. The plurality of payload bits encodes a plurality of spectral lines of a spectrum of the audio signal. Each of the payload bits exhibits a position within the current bitstream payload. The decoder includes a decoding module and an output interface. The decoding module is configured to reconstruct the audio signal. The output interface is configured to output the audio signal.

FIG. 1 illustrates a decoder for decoding a current frame to reconstruct an audio signal according to an embodiment. The audio signal is encoded within the current frame. The current frame includes a current bitstream payload. The current bitstream payload includes a plurality of payload bits. The plurality of payload bits encodes a plurality of spectral lines of a spectrum of the audio signal. Each of the payload bits exhibits a position within the current bitstream payload. The decoder includes a decoding module and an output interface. The decoding module is configured to reconstruct the audio signal. The output interface is configured to output the audio signal.

A channel encoder for encoding a frame includes a multi-mode redundancy encoder for redundancy encoding the frame in accordance with a certain coding mode from a set of different coding modes, wherein the coding modes are different from each other with respect to an amount of redundancy added to the frame, wherein the multi-mode redundancy encoder is configured to output a coded frame including at least one code word; and a colorator for applying a coloration sequence to the at least one code word; wherein the coloration sequence is such that at least one bit of the code word is changed by the application of the at least one of coloration sequence, wherein the specific coloration sequence is selected in accordance with the certain coding mode.

A channel encoder for encoding a frame includes a multi-mode redundancy encoder for redundancy encoding the frame in accordance with a certain coding mode from a set of different coding modes, wherein the coding modes are different from each other with respect to an amount of redundancy added to the frame, wherein the multi-mode redundancy encoder is configured to output a coded frame including at least one code word; and a colorator for applying a coloration sequence to the at least one code word; wherein the coloration sequence is such that at least one bit of the code word is changed by the application of the at least one of coloration sequence, wherein the specific coloration sequence is selected in accordance with the certain coding mode.