Rapid failure detection and recovery in wireless communication networks is needed in order to meet, among other things, carrier class Ethernet transport channel standards. Thus, resilient wireless packet communications is provided using a hardware-assisted rapid transport channel failure detection algorithm and a Gigabit Ethernet data access card with an engine configured accordingly. In networks with various topologies, this is provided in combination with their existing protocols, such as rapid spanning tree and link aggregation protocols, respectively.

Rapid failure detection and recovery in wireless communication networks is needed in order to meet, among other things, carrier class Ethernet transport channel standards. Thus, resilient wireless packet communications is provided using a hardware-assisted rapid transport channel failure detection algorithm and a Gigabit Ethernet data access card with an engine configured accordingly. In networks with various topologies, this is provided in combination with their existing protocols, such as rapid spanning tree and link aggregation protocols, respectively.

A system and method for detecting and correcting memory errors in CXL components is presented. The method includes receiving, into a decoder, a memory transfer block (MTB), wherein the MTB comprises data and parity information, wherein the MTB is arranged in a first dimension and a second dimension. An error checking and a correction function on the MTB is performed using a binary hamming code logic within the decoder in the first dimension. An error checking and a correction function on the MTB is performed using a non-binary hamming code logic within the decoder in the second dimension. Further, the binary hamming code logic and the non-binary hamming code logic perform the error checking on the MTB simultaneously.

A data processor includes provides memory commands to a memory channel according to predetermined criteria. The data processor includes a first error code generation circuit, a second error code generation circuit, and a queue. The first error code generation circuit generates a first type of error code in response to data of a write request. The second error code generation circuit generates a second type of error code for the write request, the second type of error code different from the first type of error code. The queue is coupled to the first error code generation circuit and to the second error code generation circuit, for provides write commands to an interface, the write commands including the data, the first type of error code, and the second type of error code.

A channel encoding method and apparatus. The method includes: obtaining A to-be-encoded information bits; mapping the A to-be-encoded information bits and L CRC bits to a first bit sequence based on an interleaving sequence, where the L CRC bits are obtained based on the A to-be-encoded information bits and a CRC polynomial, the interleaving sequence is obtained from a prestored interleaving sequence table or is obtained based on a maximum-length interleaving sequence, A+L is less than or equal to Kmax, and Kmax is a length of the maximum-length interleaving sequence; and encoding the first bit sequence. In this way, not only an encoding delay can be reduced, but also decoding has an early stop capability, so that decoding can end in advance, thereby reducing a decoding delay.

Methods, systems, and devices for wireless communication are described for dynamic frozen bits of polar codes for early termination and performance improvement. A wireless device may receive a signal comprising a codeword encoded using a polar code. The wireless device may perform decoding of the codeword including at least: parity check of a first subset of decoding paths for making a decision on early termination of decoding of the codeword based on dynamic frozen bits, and generating path metrics for a second subset of the decoding paths that each pass the parity check based on the dynamic frozen bits, and performing error detection on a bit sequence corresponding to one of the second subset of the decoding paths based at part on error detection bits and the generated path metrics. The wireless device may process the information bits based on a result of the decoding.

The present disclosure relates to a network access node and a client device for content type indication. The network access node selects a subset of bits among a set of bits in a second data packet associated with the first data packet based on the content type for the first data packet. The network access node scrambles the selected subset of bits with a first scrambling sequence associated with an identity of the client device. The network access node transmits the first data packet and the second data packet to the client device (300). Upon reception of the first data packet and the second data packet, the client device descrambles the scrambled subset of bits in the second data packet using a first scrambling sequence associated with an identity of the client device to determine the content type for the first data packet.

A communication method applied to the communication field, and in particular, to the short-range communication field, for example, an in-vehicle wireless communication system, a smart home system, or a smart manufacturing system, includes: a first node performing channel coding on at least one CB; and the first node sending, to a second node, the at least one CB on which channel coding has been performed, where the at least one CB is a CB of a first service.

A method and an apparatus for encoding a polar code concatenated with a cyclic redundancy check (CRC), where M bits are selected from K bits in the sequence to perform CRC encoding. The M bits are determined based on reliability of K polarized subchannels on which the K bits are placed and/or row weights of K rows, in a first matrix, corresponding to the K polarized subchannels on which the K bits are placed. The first matrix is an encoding matrix of polar encoding. Polar encoding is performed on the K bits and obtained CRC check bits. An encoded codeword is output.

A method and an apparatus for encoding a polar code concatenated with a cyclic redundancy check (CRC), where M bits are selected from K bits in the sequence to perform CRC encoding. The M bits are determined based on reliability of K polarized subchannels on which the K bits are placed and/or row weights of K rows, in a first matrix, corresponding to the K polarized subchannels on which the K bits are placed. The first matrix is an encoding matrix of polar encoding. Polar encoding is performed on the K bits and obtained CRC check bits. An encoded codeword is output.