Patent classifications
H04B1/0021
System and a method for management of communication subchannels in a wireless communication device
A subchannel detection system for a wireless communication device is disclosed. The system includes an input interface arranged to receive digital data over a predetermined baseband having a plurality of subchannels a plurality of frequency translators arranged to shift the spectrum of the digital data within a subchannel to the center of the baseband, a plurality of low-pass filters arranged to filter frequencies in the middle of the baseband within a subchannel bandwidth, a plurality of correlators arranged to receive a filtered digital signal and correlate the received signal to a subchannel size, and a processing module arranged to receive data from the plurality of correlators and detect one or more active subchannels. The plurality of frequency translators shift the spectrum of all subchannels in the digital data to the center of the baseband; the shifted spectra are filtered by the plurality of low-pass filters and correlated to individual subchannels.
PACKET PRIORITIZATION FOR NETWORK-BASED SOFTWARE-DEFINED RADIO
Disclosed in some examples are systems, methods, devices, and machine-readable mediums for improved communications between a software-defined radio front-end device and a network-based computing device. Rather than packetize samples together, same bit positions from multiple ADC samples may be packetized together. If a Quality of Service (QoS) metric of the network connection between the RF front-end device and the network-based processing computing drops below a threshold, the RF front-end device may prioritize sending packets with the more significant bits over packets with less significant bits. In other examples, the RF front-end device may prioritize samples corresponding to certain data types over other data types.
Method for offset calibration of a yaw rate sensor signal of a yaw rate sensor, system and computer program
A method for offset calibration of a rotation rate sensor signal of a rotation rate sensor. In a first step, an ascertainment is made that the rotation rate sensor is in an idle state. In a second step, after the first step, a filter parameter is determined as a function of the measured rotation rate sensor values, measured in the idle state, of the rotation rate sensor. In a third step, after the second step, a filtered measured rotation rate sensor value is determined with the aid of the filter parameter. An offset is determined with the aid of the filtered measured rotation rate sensor value.
Packet prioritization for network-based software-defined radio
Disclosed in some examples are systems, methods, devices, and machine-readable mediums for improved communications between a software-defined radio front-end device and a network-based computing device. Rather than packetize samples together, same bit positions from multiple ADC samples may be packetized together. If a Quality of Service (QoS) metric of the network connection between the RF front-end device and the network-based processing computing drops below a threshold, the RF front-end device may prioritize sending packets with the more significant bits over packets with less significant bits. In other examples, the RF front-end device may prioritize samples corresponding to certain data types over other data types.
METHOD FOR OFFSET CALIBRATION OF A YAW RATE SENSOR SIGNAL OF A YAW RATE SENSOR, SYSTEM AND COMPUTER PROGRAM
A method for offset calibration of a rotation rate sensor signal of a rotation rate sensor. In a first step, an ascertainment is made that the rotation rate sensor is in an idle state. In a second step, after the first step, a filter parameter is determined as a function of the measured rotation rate sensor values, measured in the idle state, of the rotation rate sensor. In a third step, after the second step, a filtered measured rotation rate sensor value is determined with the aid of the filter parameter. An offset is determined with the aid of the filtered measured rotation rate sensor value.
SYSTEMS AND METHODS FOR IMPROVING FREQUENCY RESPONSE OF A HIGH-SPEED DATA ACQUISITION DEVICE
A method for improving frequency response of a high-speed data acquisition device includes sampling signals received at an input of the high-speed data acquisition device at a first sampling rate and generating a digital data stream representative of the sampled input signals. The digital data stream is interpolated to generate an interpolated digital signal with a higher sample rate than the first sampling rate, and one or more finite impulse response (FIR) filters are applied to the interpolated digital signal to generate a filtered digital signal. The filtered digital signal corrects for: parasitic and/or expected response of elements from the network of resistors and capacitors in the anti-aliasing filter in the high-speed data acquisition device, and select anti-aliasing filter response characteristics. The filtered digital signal is decimated to reduce the sampling rate of the filtered digital signal and generate a decimated digital signal.
PACKET DETECTOR/DECODER FOR A RADIO TRANSMISSION SYSTEM
Embodiments provide a data receiver, wherein the data receiver is configured to receive a broadband signal, wherein the broadband signal includes at least two partial data packets that are distributed in time and/or frequency, wherein the data receiver is configured to perform detection of the at least two partial data packets in the broadband signal and to provide at least one detection parameter for the detected partial data packets, wherein the data receiver is configured to perform decoding of the detected partial data packet by using the at least one detection parameter, wherein the data receiver is configured to perform or process detection and decoding separately from one another.
Single clock timeshared channelizer circuit
An RF detection system includes a signal routing processor and a dynamically reconfigurable channelizer. The signal routing processor selects an operating mode of the RF detection system among a plurality of different operating mode. The dynamically reconfigurable channelizer invokes the selected operating mode in response to a routing control signal output by the signal routing processor. The dynamically reconfigurable channelizer includes a plurality of signal processing resources and a crossbar switching circuit. The crossbar switching circuit includes a signal input to receive an input signal and a signal output to output a final processed signal indicating a detected object. The crossbar switching circuit selectively establishes a plurality of different signal routing paths that connect the plurality of signal processing resources to the signal input and signal output.
SINGLE CLOCK TIMESHARED CHANNELIZER CIRCUIT
An RF detection system includes a signal routing processor and a dynamically reconfigurable channelizer. The signal routing processor selects an operating mode of the RF detection system among a plurality of different operating mode. The dynamically reconfigurable channelizer invokes the selected operating mode in response to a routing control signal output by the signal routing processor. The dynamically reconfigurable channelizer includes a plurality of signal processing resources and a crossbar switching circuit. The crossbar switching circuit includes a signal input to receive an input signal and a signal output to output a final processed signal indicating a detected object. The crossbar switching circuit selectively establishes a plurality of different signal routing paths that connect the plurality of signal processing resources to the signal input and signal output.
Sigma-delta modulator
A Sigma-Delta () modulator for converting an analog input signal having a frequency bandwidth around a variable center frequency f.sub.0 to a digital output signal at a sampling frequency f.sub.s. The modulator comprises a quantizer (420) for generating the digital output signal and a loop filter for shaping the quantization noise. The loop filter comprises at least one subfilter (430, 410) centered around a frequency f.sub.0 and constant noise shaping coefficients (451, 452, 453). The modulator further comprises a tunable delay element (455), a frequency adjuster (480) for adjusting the sampling frequency f.sub.s such that the normalized center frequency f.sub.0/f.sub.s is constant, and a delay adjuster (490) for adjusting the loop delay t.sub.d implemented by the quantizer and the tunable delay element (455), such that the normalized loop delay t.sub.d/T.sub.s falls in a predetermined range [t.sub.min, t.sub.max], where T.sub.s=1/f.sub.s.