A wideband receiver circuit is disclosed that includes a signal input configured to receive a spectrum signal of bandwidth B that contains an RF signal and an interference signal. A down conversion module is connected to the signal input and has N down conversion channels, wherein each of the N down conversion channels is configured to down convert the spectrum signal to one of N decimated baseband signals by processing the spectrum signal with one distinct phase of a sequence of length N and period N/fclk=N/2B to generate a baseband output signal. An amplifier circuit is connected to each of the N down conversion channels, and is configured to amplify the baseband output signal. A digital signal processing module including an analog to digital conversion circuit is connected to each amplifier circuit and is configured to convert the amplified baseband output signal to N digital signals. The digital signal processing module also having a digital reconstruction processor to combine each of the N digital signals and generate a reconstructed RF signal.

Disclosed is a method of receiving a compressive sensing signal and an apparatus for the same. According to an embodiment of the present disclosure, the method includes: receiving a signal processed using a predetermined dictionary set and a first sampling rate for each symbol group including one or more symbols; performing analog-to-digital conversion on the received signal at a second sampling rate that is lower than the first sampling rate; checking compressed measurement information from the signal on which analog-to-digital conversion is performed; and reconstructing values of the symbols included in the symbol group, which correspond to the compressed measurement information, on the basis of the predetermined dictionary set.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuitry is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

An integrated analog to digital converting and digital to analog converting (ADDA) RF transceiver for satellite applications, configured to replace conventional analog RF down and up conversion circuitry. The ADDA RF transceiver includes one of more ADCs, DSPs, and DACs, all on a single ASIC. Further, the circuity is to be radiation tolerant for high availability and reliability in the ionizing radiation environment present in the space environment.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

A wireless communication device can include a transmitter subsystem configured to transmit a transmit signal that, once propagated from the wireless communication device, may be reflected back and received by a receiver subsystem as interference. The wireless communication device can include a self-interference cancellation subsystem configured to generate a cancellation signal to mix with received signals to mitigate self-interference effects. A performance floor for the self-interference cancellation subsystem may be determined based on a phase noise profile of an oscillator of either or both the transmitter subsystem or the receiver subsystem. The performance floor metric can be thereafter used to inform an operation or operational setting of the wireless communication device.

Embodiments of the present invention may provide a receiver. The receiver may include an RF section, a local oscillation signal generator to generate quadrature local oscillation signals, and a quadrature mixture, coupled to the RF section, to downconvert a first group of wireless signals directly to baseband frequency quadrature signals and to downconvert a second group of wireless signals to intermediate frequency quadrature signals. The receiver may also include a pair of analog-to-digital converters (ADCs) to convert the downconverted quadrature signals to corresponding digital quadrature signals. Further, the receiver may include a digital section having two paths to perform signal processing on the digital baseband frequency quadrature signals and to downconvert the digital intermediate frequency signals to baseband cancelling a third order harmonic distortion therein. Moreover, the receiver may include a phase corrector to adjust a phase of one of the local oscillation signals to balance the third order harmonic distortion and a gain offset generator to adjust a gain of one of the downconverted signals to balance the third order harmonic distortion.

A digital filter for interpolation or decimation and a device incorporating the digital filter is disclosed. The digital filter includes a filter block, a first transformation circuit coupled to the filter block and an input stream coupled to provide input values to a component selected from the filter block and the first transformation circuit. The filter block includes a pair of sub-filters having respective transformed coefficients, the respective transformed coefficients of a first sub-filter of the pair of sub-filters being symmetric and the respective transformed coefficients of a second sub-filter of the pair of sub-filters being anti-symmetric. The first transformation circuit is coupled to perform a first transformation; the filter block and the first transformation circuit together provide suppression of undesired spectral images in final outputs of the digital filter.

Apparatuses (and methods of manufacturing same), systems, and methods concerning polyphase digital filters are described. In one aspect, an apparatus is provided, including at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients. In one aspect, the apparatus is a polyphase finite impulse response (FIR) digital filter, including an interpolator and a decimator, where each of the interpolator and the decimator have at least one pair of subfilters, each having symmetric coefficients, and a lattice comprising two adders and feedlines corresponding to each of the at least one pair of subfilters, each having symmetric coefficients.

A wideband receiver circuit is disclosed that includes a signal input configured to receive a spectrum signal of bandwidth B that contains an RF signal and an interference signal. A down conversion module is connected to the signal input and has N down conversion channels, wherein each of the N down conversion channels is configured to down convert the spectrum signal to one of N decimated baseband signals by processing the spectrum signal with one distinct phase of a sequence of length N and period N/fclk=N/2B to generate a baseband output signal. An amplifier circuit is connected to each of the N down conversion channels, and is configured to amplify the baseband output signal. A digital signal processing module including an analog to digital conversion circuit is connected to each amplifier circuit and is configured to convert the amplified baseband output signal to N digital signals. The digital signal processing module also having a digital reconstruction processor to combine each of the N digital signals and generate a reconstructed RF signal.