H04L25/49

Low power chip-to-chip bidirectional communications
11477055 · 2022-10-18 · ·

Methods and systems are described for receiving symbols of a codeword via wires of a multi-wire bus, the codeword representing an aggregate sum of a plurality of sub-channel constituent codewords, each sub-channel constituent codeword representing a weight applied to an associated sub-channel vector of a plurality of sub-channel vectors of an orthogonal matrix, generating a plurality of comparator outputs using a plurality of common-mode resistant multi-input comparators (MICs), each common-mode resistant MIC having a set of input coefficients representing a corresponding sub-channel vector of the plurality of sub-channel vectors, each sub-channel vector (i) mutually orthogonal and (ii) orthogonal to a common-mode sub-channel vector, outputting a set of forward-channel output bits formed based on the plurality of comparator outputs, obtaining a sequence of reverse-channel bits, and transmitting the sequence of reverse-channel bits by sequentially transmitting common-mode codewords over the wires of the multi-wire bus.

Systems and methods for ultra wideband impulse radio transceivers

Ultra-Wideband (UWB) technology exploits modulated coded impulses over a wide frequency spectrum with very low power over a short distance for digital data transmission. Today's leading edge modulated sinusoidal wave wireless communication standards and systems achieve power efficiencies of 50 nJ/bit employing narrowband signaling schemes and traditional RF transceiver architectures. However, such designs severely limit the achievable energy efficiency, especially at lower data rates such as below 1 Mbps. Further, it is important that peak power consumption is supportable by common battery or energy harvesting technologies and long term power consumption neither leads to limited battery lifetimes or an inability for alternate energy sources to sustain them. Accordingly, it would be beneficial for next generation applications to exploit inventive transceiver structures and communication schemes in order to achieve the sub nJ per bit energy efficiencies required by next generation applications.

HIGH SPEED COMMUNICATIONS SYSTEM
20230068176 · 2023-03-02 ·

Transmission of baseband and carrier-modulated vector codewords, using a plurality of encoders, each encoder configured to receive information bits and to generate a set of baseband-encoded symbols representing a vector codeword; one or more modulation circuits, each modulation circuit configured to operate on a corresponding set of baseband-encoded symbols, and using a respective unique carrier frequency, to generate a set of carrier-modulated encoded symbols; and, a summation circuit configured to generate a set of wire-specific outputs, each wire-specific output representing a sum of respective symbols of the carrier-modulated encoded symbols and at least one set of baseband-encoded symbols.

HIGH SPEED COMMUNICATIONS SYSTEM
20230068176 · 2023-03-02 ·

Transmission of baseband and carrier-modulated vector codewords, using a plurality of encoders, each encoder configured to receive information bits and to generate a set of baseband-encoded symbols representing a vector codeword; one or more modulation circuits, each modulation circuit configured to operate on a corresponding set of baseband-encoded symbols, and using a respective unique carrier frequency, to generate a set of carrier-modulated encoded symbols; and, a summation circuit configured to generate a set of wire-specific outputs, each wire-specific output representing a sum of respective symbols of the carrier-modulated encoded symbols and at least one set of baseband-encoded symbols.

SYNCHRONOUSLY-SWITCHED MULTI-INPUT DEMODULATING COMPARATOR
20230062846 · 2023-03-02 ·

Methods and systems are described for obtaining a set of carrier-modulated symbols of a carrier-modulated codeword, each carrier-modulated symbol received via a respective wire of a plurality of wires of a multi-wire bus, applying each carrier-modulated symbol of the set of carrier-modulated symbols to a corresponding transistor of a set of transistors, the set of transistors further connected to a pair of output nodes according to a sub-channel vector of a plurality of mutually orthogonal sub-channel vectors, recovering a demodulation signal from the carrier-modulated symbols, and generating a demodulated sub-channel data output as a differential voltage on the pair of output nodes based on a linear combination of the set of carrier-modulated symbols by controlling conductivity of the set of transistors according to the demodulation signal.

ADAPTATION TO A PULSE WIDTH MODULATION FREQUENCY VARIATION FOR A SENSOR OPERATING IN A SYNCHRONOUS MODE

In some implementations, a sensor may determine a delay latency value associated with an amount of time from completion of a set of sensor tasks to an actual time of reception of a trigger to selectively transmit or sample sensor data. The sensor may calculate a deviation of the delay latency value from a target delay latency. The sensor may transmit a data frame including an indication associated with the deviation of the delay latency value from the target delay latency.

HIGH BANDWIDTH CAN-DERIVATIVE COMMUNICATION
20230060218 · 2023-03-02 ·

A communication system for high bandwidth communication over a Controller Area Network (CAN) communication bus, the data frame has a logical structure according to CAN Standard ISO 11898-1 and is composed of a sequence of bits and waveform defining a Start - Of-Frame-Bit, an Arbitration Field, a Control Field, a Data Field, a CRC Field, an Acknowledge Field and an End- Of-Frame Field, the communication system comprises at least one transmitting node and at least one receiving node, and a controller unit of the transmitting node is to code and transmit the Data Field by modulating a sequence of pulses with varying durations defined by deviating a number of level transitions of a known cyclic signal waveform by a series of delays, wherein the series of delays is indicative of a sequence of data symbols to be transmitted and wherein the series of delays is calculated by applying different modulation calculations for odd and even elements,

COMMUNICATION SYSTEM, TRANSMISSION APPARATUS, RECEPTION APPARATUS, MATRIX GENERATION APPARATUS, COMMUNICATION METHOD, TRANSMISSION METHOD, RECEPTION METHOD, MATRIX GENERATION METHOD AND RECORDING MEDIUM
20230063344 · 2023-03-02 · ·

A communication system SYS includes a transmission apparatus 1 and a reception apparatus 2. The transmission apparatus includes: a conversion unit 111 for converting a bit stream Z having a bit length b into a bit stream Y that has w−1 (w is an integer equal to or larger than 2) bit 1 and that has a bit length n (n>b); a conversion unit 112 for converting the bit stream Y into a bit stream X having a bit length t (t<n); and a Neural Network 113 that has a t input node and that outputs a value relating to a feature of a transmission signal Tx when the bit stream X is inputted thereto. The reception apparatus includes: a Neural Network 212 that has a t output node and that outputs a numerical data stream U including t numerical data when a feature of the reception signal is inputted thereto; a conversion unit 213 for converting the numerical data stream U into a numerical data stream Y′ including n numerical data; and a generation unit 214 for generating a bit stream Z′ having the bit length b by performing, on the numerical data stream U, an inverse conversion of a conversion processing performed by the conversion unit 111.

Methods for providing a pulse-width modulated power signal, node and system
11632274 · 2023-04-18 · ·

The invention relates to methods for providing a pulse-width modulated power signal in which control signals are used to define phase states and duration. The invention further relates to a corresponding node and to a corresponding system.

CMOS signaling front end for extra short reach links
11632275 · 2023-04-18 · ·

A transceiver circuit includes a receiver front end utilizing a ring oscillator, and a transmitter front end utilizing a pass-gate circuit in a first feedback path across a last-stage driver circuit. The transceiver circuit provides low impedance at low frequency and high impedance at high frequency, and desirable peaking behavior.