Systems and methods for autonomous signal modulation format identification are disclosed. In an example embodiment of the disclosed technology, a method includes applying higher-order statistics to an input signal to identify the input signal's modulation format. The method may include applying higher-order statistics to the input signal to calculate higher-order cumulant values for the input signal as higher-order cumulants are indicative of a particular modulation format signature. The method may further include employing a decision tree to determine the modulation format of the input signal.

A signal detection method that allows characterization of a modulated signal to be efficiently determined. The method comprises the steps of receiving a data signal, processing the data signal to determine its value squaring the value of the signal; filtering the squared signal value to remove DC content; evaluating the resulting signal to determine if a single sinusoidal value remains; and determining that the presence of a single sinusoidal value as the resulting signal from the squaring and filtering steps indicates that the received data signal is a phase-shift key signal or conversely that the absence of such after a given number of cycle of squaring and filtering indicates a different modulation technique is present in the signal.

Aspects of the invention include an equivalent-time sampling oscilloscope that receives a carrier signal, the carrier signal after it has been modulated with a repeating data pattern, and a pattern trigger signal that is synchronous with the data pattern. The carrier signal and the modulation are asynchronous, that is, they are not phase-locked in any way. The oscilloscope simultaneously samples the modulated carrier signal and quadrature phases of the unmodulated carrier signal at a plurality of timebase delays relative to the pattern trigger signal, and a plurality of times at each timebase delay. After collecting this information, the oscilloscope uses the quadrature samples to calculate phases of the unmodulated carrier signal that correspond to the samples of the modulated carrier signal. The oscilloscope then calculates a stationary representation of the modulated carrier signal by selecting samples of the modulated carrier signal that correspond to a carrier signal phase progression that would have been observed if the unmodulated carrier signal had been synchronous with the pattern trigger signal.

Aspects of the invention include an equivalent-time sampling oscilloscope that receives a carrier signal, the carrier signal after it has been modulated with a repeating data pattern, and a pattern trigger signal that is synchronous with the data pattern. The carrier signal and the modulation are asynchronous, that is, they are not phase-locked in any way. The oscilloscope simultaneously samples the modulated carrier signal and quadrature phases of the unmodulated carrier signal at a plurality of timebase delays relative to the pattern trigger signal, and a plurality of times at each timebase delay. After collecting this information, the oscilloscope uses the quadrature samples to calculate phases of the unmodulated carrier signal that correspond to the samples of the modulated carrier signal. The oscilloscope then calculates a stationary representation of the modulated carrier signal by selecting samples of the modulated carrier signal that correspond to a carrier signal phase progression that would have been observed if the unmodulated carrier signal had been synchronous with the pattern trigger signal.

Apparatus and methods for a digital-to-time converter (DTC) are provided. In an example, a DTC can include a phase interpolator and a ring oscillator. The phase interpolator can be configured to receive digital representations of two or more distinct phase signals, and to interpolate the digital representations of the two or more distinct phase signals to provide an interpolated output phase signal. The ring oscillator can be configured to receive the interpolated phase signal, to lock on to a frequency and a phase of the interpolated output phase signal, and to provide a filtered phase signal.

The inventive phase measuring device includes a first A/D converter 2 that digitizes a first periodical input signal X at each predetermined sampling timing and outputs the resultant signal as a digital signal Xd, a first zero-crossing identification means operable to detect a sign of Xd, a counting processing unit 4 that counts a difference in the number of times of zero-crossing detection by the first zero-crossing identification means and calculates the difference at each sampling timing, and a fraction processing unit 5 that computes a fraction of the number of times of zero-crossing detection on the basis of Xd at sampling timings immediately before and immediately after determination of zero-crossing by the first zero-crossing identification means. An averaging processing unit 6 performs averaging by adding up and totalizing the outputs from the counting processing unit 4 and the fraction processing unit 5, thereby computing a phase. The inventive device thus implements a digital phase measuring device and a digital phase difference measuring device that allow input of periodical signals in a wide frequency range and that are capable of accurate and real-time measurement.

A phase angle can be measured between an analog signal and a reference signal by converting the analog signal to digital samples in a residue number system (RNS) analog-to-digital converter (ADC), based on a RNS scheme. The phase angle can be measured directly from the RNS values output by the RNS ADC, or the RNS values can be converted to a binary scheme, such as straight binary, offset binary or two's complement, before calculating the phase angle measurement.

An embodiment of the present invention relates to a low-power broadband asynchronous BPSK demodulation method and a configuration of a circuit thereof. In connection with a configuration of a BPSK demodulation circuit, there may be provided a low-power wideband asynchronous binary phase shift keying demodulation circuit comprising: a sideband separation and lower sideband signal delay unit; a data demodulation unit; and a data clock restoration unit.

An embodiment of the present invention relates to a low-power broadband asynchronous BPSK demodulation method and a configuration of a circuit thereof. In connection with a configuration of a BPSK demodulation circuit, there may be provided a low-power wideband asynchronous binary phase shift keying demodulation circuit comprising: a sideband separation and lower sideband signal delay unit; a data demodulation unit; and a data clock restoration unit.

According to one aspect, an embodiment radio frequency receiver device comprises an input interface configured to receive a radio frequency signal of a given type and convert same into an electric signal, a detector configured to detect at least one voltage level in the electric signal, a pulse generator configured to generate at least one pulse train representative of the voltage levels detected, and a processing unit configured to determine the type of the radio frequency signal from the at least one pulse train.