To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor.

A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.

There is provided an imaging device including: a pixel that outputs a pixel signal corresponding to an amount of incident light; an output signal line that is connected to the pixel to allow the pixel signal from the pixel to be output to the output signal line; a first transistor that has a first gate, a first source, and a first drain, one of the first source and the first drain being connected to the output signal line; and a first circuit that is connected to the first gate, the first circuit being configured to generate a third voltage that is a voltage between a first voltage and a second voltage, the first voltage being a voltage for turning on the first transistor, the second voltage being a voltage for turning off the first transistor.

An image sensor pixel may include a photodiode, a floating diffusion, and a transfer gate. Column readout circuitry coupled to the image sensor pixel via a column line. Voltage settling circuitry may be coupled to the column line. Voltage settling circuitry may include a pre-charging circuit, a reset voltage slew boosting circuit, and an image signal voltage slew boosting circuit. The pre-charging circuit may pull down the column line voltage to a grounding voltage. The reset voltage slew boosting circuit may pull up the column line voltage to a reference voltage near a reset level voltage. The image signal voltage slew boosting circuit may pull down the column line voltage to an additional reference voltage near an image signal voltage. With the use of the voltage settling circuitry, a faster pre-charge and clamping of the column line can be achieved.

To prevent the black dot phenomenon from occurring in a differential amplification-type solid-state image sensor. A signal-side amplifier transistor generates an output voltage corresponding to a signal current corresponding to one of a pair of differential input voltages by supplying the signal current from an output node to a common-phase node. A reference-side amplifier transistor supplies a reference current corresponding to the other one of the pair of differential input voltages to the common-phase node. A constant current source constantly controls a sum of the signal current and the reference current to be merged at the common-phase node. A bypass control unit connects the output node and the common-phase node and supplies the signal current having a value corresponding to a predetermined limit voltage to the common-phase node in a case in which the output voltage reaches the limit voltage.

An anti-eclipse circuit for use in an imager includes a differential amplifier and a feedback circuit. The differential amplifier is coupled to an output line for receiving an output signal associated with the voltage level of a floating diffusion region in a pixel of the imager and configured to detect when a reset signal received from the pixel drops below a predetermined level. The feedback circuit is configured to increase the reset signal when the output signal is lower than the clamp voltage, thereby keeping the reset signal at the constant level.

An image sensor may include an array of dual conversion gain image pixels arranged in rows and columns. The image pixels arranged along the same column may be coupled to a column line. The column line may be coupled to anti-eclipse control circuitry. In one suitable arrangement, the anti-eclipse control circuitry may include a comparator that compares the output signal on the column line to an anti-eclipse bias voltage. If, during a reset sampling period, the output signal on the column line is less than the anti-eclipse bias voltage, a current source may be used to charge the bottom plate of a dual conversion gate capacitor in the selected image pixel to help restore the voltage of the floating diffusion node in the selected pixel.

Imagers and associated devices and systems are disclosed herein. In one embodiment, an imager includes a pixel array and control circuitry operably coupled to the pixel array. The pixel array includes an imaging pixel configured to produce a reset signal and a non-imaging pixel configured to produce a nominal reset signal. The control circuitry is configured to produce an output signal based at least in part on one of (a) the nominal reset signal when distortion at the imaging pixel exceeds a threshold and (b) the reset signal when distortion does not exceed the threshold.

A system and method is provided for performing high dynamic range digital double sampling. More particularly, a CMOS image sensor is provided that includes a pixel array with each pixel sampling both dark and bright values for digital double sampling. After the sampled signals are digitized, a mean dark value is determined and each dark value is further fed to a lookup table that generates an output value taking into account whether the pixel has been saturated. In over exposed conditions, the lookup table will generate a negative value output to eliminate image artifacts. All three values are fed to adder logic circuit that subtracts the mean dark value and the lookup table output from the bright value. This resulting output is fed to a video viewer.

An imaging device includes: a pixel including a photoelectric converter that generates signal charge by photoelectric conversion, and a charge accumulation region that accumulates the signal charge, the pixel being configured to output a signal corresponding to a voltage of the charge accumulation region; a signal line electrically connected to the pixel, the signal being transmitted through the signal line; a first switch that is electrically connected to the signal line and that has input-output characteristics in which an output is linear with respect to an input up to a clipping voltage and the output is clipped at the clipping voltage with respect to the input exceeding the clipping voltage; and a second switch that is electrically connected to the signal line and that has input-output characteristics in which an output is linear with respect to an input.

In an imaging array having a plurality of pixel sensors arranged in a plurality of rows and columns, pixel data being read out on column lines of the array, a column line voltage clamp circuit for column lines of the array includes a master voltage clamp circuit coupled to provide a reference voltage clamp level on a reference node, and a slave voltage clamp circuit coupled to each column line in the imaging array, each slave voltage clamp circuit configured to clamp voltage on the column line to a column voltage clamp level derived from the reference voltage level.