The present technology relates to a solid-state imaging device, method for driving the same, and electronic apparatus capable of avoiding an occurrence of a blackout in low-speed read-out. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is two-dimensionally arranged in a matrix, and a control unit that exposes all pixels of the pixel array unit at a same exposure timing and performs thinned read-out 2(N−1) times in which all the pixels are thinned to 1/N, so as to read electric charge in all the pixels of the pixel array unit, the electric charge being generated at the same exposure timing. The present technology can be applied to, for example, a solid-state imaging device, or the like, incorporated in an imaging device.

The present technology relates to a solid-state imaging device, method for driving the same, and electronic apparatus capable of avoiding an occurrence of a blackout in low-speed read-out. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is two-dimensionally arranged in a matrix, and a control unit that exposes all pixels of the pixel array unit at a same exposure timing and performs thinned read-out 2(N−1) times in which all the pixels are thinned to 1/N, so as to read electric charge in all the pixels of the pixel array unit, the electric charge being generated at the same exposure timing. The present technology can be applied to, for example, a solid-state imaging device, or the like, incorporated in an imaging device.

An image sensor includes a pixel configured to operate in a high conversion gain (HCG) mode and a low conversion gain (LCG) mode during a readout period, and a correlated double sampling (CDS) circuit configured to generate a comparison signal based on a ramp signal and a pixel voltage received from the pixel, wherein the CDS circuit includes a comparator configured to: receive the pixel voltage through a first input node, receive the ramp signal through a second input node based on an LCG reset signal or an LCG image signal being received as the pixel voltage, and receive the ramp signal through a third input node based on an HCG reset signal or an HCG image signal being received as the pixel voltage; and compare the ramp signal to the pixel voltage, and output the comparison signal corresponding to a comparison result.

An image sensor includes a pixel configured to operate in a high conversion gain (HCG) mode and a low conversion gain (LCG) mode during a readout period, and a correlated double sampling (CDS) circuit configured to generate a comparison signal based on a ramp signal and a pixel voltage received from the pixel, wherein the CDS circuit includes a comparator configured to: receive the pixel voltage through a first input node, receive the ramp signal through a second input node based on an LCG reset signal or an LCG image signal being received as the pixel voltage, and receive the ramp signal through a third input node based on an HCG reset signal or an HCG image signal being received as the pixel voltage; and compare the ramp signal to the pixel voltage, and output the comparison signal corresponding to a comparison result.

An imaging device includes groupings of photodiodes having four photodiodes. A transfer transistor is between each photodiode and a floating diffusion. Each floating diffusion is coupled to up to two photodiodes per grouping at a time through transfer transistors. A buffer transistor is coupled to each floating diffusion. The buffer transistors may be in a first or second grouping of buffer transistors. A first bit line is coupled to up to two buffer transistors of the first grouping and a second bit line is coupled to up to two buffer transistors of the second grouping of buffer transistors at a time. A color filter array including a plurality of groupings of color filters is disposed over respective photodiodes of the photodiode array, wherein each grouping of color filters includes four color filters having a same color, wherein each grouping of color filters overlaps two groupings of photodiodes.

An imaging device includes groupings of photodiodes having four photodiodes. A transfer transistor is between each photodiode and a floating diffusion. Each floating diffusion is coupled to up to two photodiodes per grouping at a time through transfer transistors. A buffer transistor is coupled to each floating diffusion. The buffer transistors may be in a first or second grouping of buffer transistors. A first bit line is coupled to up to two buffer transistors of the first grouping and a second bit line is coupled to up to two buffer transistors of the second grouping of buffer transistors at a time. A color filter array including a plurality of groupings of color filters is disposed over respective photodiodes of the photodiode array, wherein each grouping of color filters includes four color filters having a same color, wherein each grouping of color filters overlaps two groupings of photodiodes.

Provided is a semiconductor element capable of inspecting a plurality of wires formed in parallel. A semiconductor element according to an embodiment includes: a first circuit (45B) connected to a first position of each of a plurality of wires of a first wire group (31) including the plurality of wires; a second circuit (45A) connected to a second position corresponding to an end of each of the plurality of wires; and a plurality of connection units (43) that connects a third circuit (14) with each of the plurality of wires, the plurality of connection units (43) being provided on a one-to-one basis to the plurality of wires between the first position and the second position of each of the plurality of wires.

A solid-state imaging device includes M pixel units to and a correction unit. The pixel unit includes a main amplifier, a capacitive element, a first switch, a second switch, a photodiode, a feedback capacitive element, and an initialization switch. The correction unit includes a null amplifier, a capacitive element, a first switch, and a second switch. An effective offset voltage of the main amplifier is small.

An event-driven sensor including: a pixel array; a column readout circuit coupled to column output lines of the pixel array, the column readout circuit including a plurality of column register cells; and a row readout circuit including a readout memory having a storage location corresponding to each pixel of the pixel array, the readout memory having sets of one or more row lines for writing to rows of memory locations of the readout memory, wherein each row output line of the pixel array is coupled, via a corresponding row line control circuit, to a corresponding one of the sets of one or more row lines of the readout memory.

An image sensing device may include a pixel circuit and a driving control circuit. The pixel circuit is configured to store photocharge, generated by a photoelectric conversion element, as image information. The driving control circuit may control the pixel circuit to adjust the signal conversion gain ratio depending on the illuminance of the incident light at the image sensing device.