The present invention relates to a composition for forming a conductive pattern which allows micro conductive patterns to be formed on various polymeric resin products or resin layers by a very simplified process, a method for forming a conductive pattern using the composition, and a resin structure having the conductive pattern. The composition for forming a conductive pattern comprises: a polymeric resin; and a nonconductive metallic compound including a first metal, a second metal and a third metal, wherein the nonconductive metallic compound has a three-dimensional structure including a plurality of first layers (edge-shared octahedral layers) having a structure in which octahedrons comprising two metals from among the first metal, the second metal and the third metal which share the edges thereof with one another are two-dimensionally connected to one other, and a second layer which includes a metal of a different type from the first layer and is arranged between adjacent first layers, and wherein a metallic core including the first metal, the second metal or the third metal or an ion thereof is formed from the nonconductive metallic compound by electromagnetic radiation.

Provided is a compound which is excellent terms of stability and tight adhesion to substrates and on which wiring can be formed by electroless plating. The compound is a high-molecular-weight compound having a constituent unit represented by the following formula (1). [In formula (1), R1 represents a hydrogen atom or a methyl group, m is an integer of 2-20, and Q represents a photosensitive leaving group.]

A selective segment via plating process for manufacturing a circuit board selectively interconnects inner conductive layers as separate segments within the same via. Plating resist is plugged into an inner core through hole and then stripped off after an electroless plating process. Stripping of the electroless plating on the plating resist results in a plating discontinuity on the via wall. In a subsequent electroplating process, the inner core layer can not be plated due to the plating discontinuity. The resulting circuit board structure has separate electrically interconnected segments within the via.

A manufacturing method of a metal bump structure is provided. A driving base is provided. At least one pad and an insulating layer are formed on the driving base. The pad is formed on an arrangement surface of the driving base and has an upper surface. The insulating layer covers the arrangement surface of the driving base and the pad, and exposes a part of the upper surface of the pad. A patterned metal layer is formed on the upper surface of the pad exposed by the insulating layer, and extends to cover a part of the insulating layer. An electro-less plating process is performed to form at least one metal bump on the patterned metal layer. A first extension direction of the metal bump is perpendicular to a second extension direction of the driving base.

A printed wiring board according to an aspect of the present invention includes: an electrically insulating base film; and an electrically conductive pattern stacked on at least one surface side of the base film, wherein an average width of a plurality of wiring portions included in the electrically conductive pattern is 5 μm or greater and 20 μm or less, wherein each of the wiring portions includes a seed layer and a plating layer, wherein the plating layer includes copper crystal planes of a (111) plane, a (200) plane, a (220) plane, and a (311) plane, and wherein an intensity ratio IR.sub.220 of an X-ray diffraction intensity of the copper crystal plane (220) obtained by Equation (1) below is 0.05 or greater and 0.14 or less,

IR.sub.220=I.sub.220/(I.sub.111+I.sub.220+I.sub.311)  (1)

(where I.sub.111 is an X-ray diffraction intensity of the (111) plane, I.sub.200 is an X-ray diffraction intensity of the (200) plane, I.sub.220 is the X-ray diffraction intensity of the (220) plane, and I.sub.311 is an X-ray diffraction intensity of the (311) plane in Equation (1)).

The disclosure provides a circuit substrate and a method for manufacturing the same. The circuit substrate includes a wiring and a substrate having a base region and a circuit region. The base region having a first pattern is constituted by a first thermoplastic material. The circuit region having a second pattern is constituted by a second thermoplastic material. The first pattern has a portion opposite to the second pattern. The wiring is formed on the circuit region along the second pattern. The first thermoplastic material is different from the second thermoplastic material, and the second thermoplastic material includes a catalyst particle.

An autocatalytic gold bath capable of depositing gold from solution onto a substrate, wherein the substrate has one or more metal layers thereon. The autocatalytic gold bath includes (a) a chelator; (b) a gold salt; and (c) a reducing agent, wherein the reducing agent comprises an organic molecule having more than one carbon atom on the organic molecule. A process of plating gold onto the surface of the one or more metal layers on the substrate is also included. The gold plating bath can be used to deposit a final finish to the surface of the one or more metal layers which can be formed in an ENIG, ENEPIG, EPAG, direct gold over copper or gold over silver process.

A circuit board includes a base layer, a seed layer formed on the base layer, and a first electrode layer formed on the seed layer. The seed layer is formed of a metal oxide with a thickness of 100 to 400 Å. he circuit board may further include an insulation layer formed on the first electrode layer and a second electrode layer formed on the insulation layer.

A wiring circuit board includes a metal support layer, a base insulating layer disposed on one side in a thickness direction of the metal support layer, and a conductive layer disposed on one side in the thickness direction of the base insulating layer, and including a first terminal and a ground lead residual portion electrically connected to the first terminal. The base insulating layer has a through hole penetrating in the thickness direction. The ground lead residual portion has an opening continuous so as to surround the through hole.

A wiring substrate includes an insulating substrate, a conductor and an Ni film. The insulating substrate has a first surface and a second surface on a side opposite the first surface, and contains AlN. The conductor is disposed on the first surface and contains Cu. The Ni film is disposed so as to extend across an upper surface and a side surface of the conductor to the first surface. Ti oxide is scattered so as to be at a plurality of points on the first surface.