A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

A printed circuit board includes: an insulating layer; a first circuit layer disposed on one surface of the insulating layer, and including a first circuit pattern and a first connection pad; and a surface treatment layer disposed on one surface of the first connection pad. The other surface of the first connection pad is covered by the insulating layer, and at least a portion of a side surface of the first connection pad is spaced apart from the insulating layer.

An electronic device includes a first part, and a circuit plate including a circuit substrate, a plating film made of a plating material and being disposed on a front surface of the substrate. The plating film includes a first part region on which the first part is disposed via a first solder, and a liquid-repellent region extending along a periphery side of the first part region in a surface layer of the plating film, and having a liquid repellency greater than a liquid repellency of the plating film. The liquid-repellent region includes a resist region. The plating film includes a remaining portion between the liquid-repellent region and the front surface of the circuit substrate in a thickness direction of the plating film orthogonal to the front surface. The remaining portion is made of the plating material and is free of the oxidized plating material.

A printed wiring board includes resin insulating layers including an outermost resin insulating layer, conductor layers laminated on the resin insulating layers, a copper layer formed in the outermost insulating layer, and metal bumps formed on the copper layer such that the bumps have upper surfaces protruding from the outermost insulating layer and that each metal bump includes Ni film, Pd film and Au film. The copper layer is reduced in diameter toward upper surface side such that the copper layer has upper and bottom surfaces and each upper surface has diameter that is smaller than diameter of each bottom surface, the outermost insulating layer has cylindrical sidewalls formed such that at least part of the copper layer is not in contact with the sidewalls, and the bumps are formed such that the Ni film is filling spaces between the copper layer and the sidewalls of the outermost insulating layer.

A metal circuit structure based on a flexible printed circuit (FPC) contains: a substrate, a first metal layer attached on the substrate, a second metal layer formed on the first metal layer, and an intermediate layer defined between the first metal layer and the second metal layer. A first surface of the intermediate layer is connected with the first metal layer, and a second surface of the intermediate layer is connected with the second metal layer. The intermediate layer is made of a first material, the second metal layer is made of a second material, and the first material of the intermediate layer does not act with the second material of the second metal layer.

In a transmission path transmitting high-frequency signals each signal contains a frequency component of over 8 GHz. The transmission path includes a nickel-phosphorus layer containing nickel and phosphorus, and a phosphorus concentration of the nickel-phosphorus layer is over 0 mass % and less than 8 mass %. Such a structure enables the transmission path to have little loss even when a signal at a frequency of over 8 GHz is transmitted.

Provided is a ceramic laminated substrate which is formed on an electronic component to be mounted and is less likely to cause mounting defects even if there is irregularity in the height of solders. The ceramic laminated substrate includes: a ceramic laminate on which ceramic layers are laminated; via conductors; terminal electrodes; and a land electrode. The land electrode has a first land electrode and a second land electrode that are used to join different terminal electrodes of a single electronic component. The area of the first land electrode is smaller than the area of the second land electrode, and the first land electrode has a bump electrode and a plating layer, the second land electrode has a membrane electrode and plating layers, and the height of the first land electrode is formed higher than the height of the second land electrode.

A method for manufacturing a wiring substrate includes forming a conductor layer including first and second pads, forming a resin insulating layer on the conductor layer, forming, in the insulating layer, a first opening exposing the first pad and a second opening exposing the second pad, forming a covering layer on the insulating layer such that the covering layer covers the first and second openings, forming a third opening in the covering layer such that the third opening communicates with the first opening and the first pad is exposed in the third opening, forming, on a surface of the first pad, a protective film formed of material different from material forming the conductor layer, removing the covering layer from the insulating layer, and forming a conductor post on the second pad such that the conductor post is formed of material that is same as the material forming the conductor layer.

A ceramic circuit substrate having high bonding performance and excellent thermal cycling resistance properties, having a circuit pattern provided on a ceramic substrate with a braze material layer interposed therebetween, and a protruding portion formed by the braze material layer protruding from the outer edge of the circuit pattern, wherein: the braze material layer includes Ag, Cu, Ti, and Sn or In; and an Ag-rich phase is formed continuously for 300 μm or more, towards the inside, from an outer edge of the protruding portion, along a bonding interface between the ceramic substrate and the circuit pattern, and has a bonding void ratio of 1.0% or less.