To provide a method for manufacturing a laminate body with excellent heat resistance (solder heat resistance, for example) and excellent conduction reliability in which a small diameter via hole can be formed. RESOLUTION MEANS To provide a manufacturing method of a laminate body, containing: a step of forming onto a supporting body a curable resin composition layer formed from a thermosetting resin composition to obtain a curable resin composition layer with a supporting body; a step of laminating the aforementioned curable resin composition with a supporting body onto a substrate on a curable resin composition layer forming surface side to obtain a pre-cured composite with a supporting body formed from a substrate and a curable resin composition layer with a supporting body; a step of performing a first heating of the aforementioned composite and thermally curing the aforementioned curable resin composition layer to form a cured resin layer to obtain a cured composite with a supporting body formed from a substrate and a cured resin layer with a supporting body; a step of performing hole punching from the aforementioned supporting body side of the aforementioned cured composite with a supporting body to form a via hole in the aforementioned cured resin layer; a step of peeling the aforementioned supporting body from the aforementioned cured composite with a supporting body to obtain a cured composite formed from a substrate and a cured resin layer a step of removing resin residue in the via hole of the aforementioned cured composite; a step of performing a second heating of the aforementioned cured composite; and a step of forming a conductor layer on an inner wall surface of the via hole of the aforementioned cured composite and on the aforementioned cured resin layer.

Problem: To provide a method for manufacturing a laminate body with excellent heat resistance (solder heat resistance, for example), in which a small diameter via hole can be formed. RESOLUTION MEANS: The provision of a manufacturing method of a laminate body, containing: a step of forming onto a supporting body a curable resin composition layer formed from a thermosetting resin composition to obtain a curable resin composition layer with a supporting body; a step of laminating the aforementioned curable resin composition layer with a supporting body onto a substrate on a curable resin composition layer forming surface side to obtain a pre-curing composite with a supporting body formed from a substrate and a curable resin composition layer with a supporting body; a step of performing a first heating of the aforementioned composite and thermally curing the aforementioned curable resin composition layer to form a cured resin layer to obtain a cured composite with a supporting body formed from a substrate and a cured resin layer with a supporting body; a step of performing hole punching from the aforementioned supporting body side of the aforementioned cured composite with a supporting body to form a via hole in the aforementioned cured resin layer; a step of peeling the aforementioned supporting body from the aforementioned cured composite with a supporting body to obtain a cured composite formed from a substrate and a cured resin layer, a step of performing a second heating of the cured composite; a step of removing resin residue in the via hole of the aforementioned cured composite; and an step of forming a conductor layer on an inner wall surface of the via hole of the aforementioned cured composite and on the aforementioned cured resin layer; wherein the forming of the conductor layer in the via hole is performed via electroless plating or a combination of electroless plating and electrolytic plating.

In one aspect, a PCB is provided. The PCB includes at least one insulating layer, a blind slot, and at least one via. The at least on insulating layer includes a first surface and a second surface opposite the first surface. The blind slot is plated and formed in the at least one insulating layer, where the blind slot partially extends from the first surface to the second surface, and where the blind slot includes a conductive plating bonded along a major surface of the blind slot. The at least one via is electrically conductive and filled, where the at least one via is coupled with and extends between the conductive plating of the blind slot and the second surface of the at least one insulating layer.

A printed circuit board, an in-circuit test structure and a method for producing the in-circuit test structure thereof are disclosed. The in-circuit test structure comprises a via and a test pad. The via passes through the printed circuit board for communicating with an electrical device to be tested on the printed circuit board. The test pad is formed on an upper surface of the printed circuit board and covering the via, wherein a center of the via deviates from a center of the test pad. In the in-circuit test, the accuracy of the test data can be improved by means of the in-circuit test structure provided by the present invention, and thus the reliability of the test result is ensured. Also, the test efficiency of the in-circuit test is improved.

A method for manufacturing a structure for embedding and packaging multiple devices by layer includes preparing a polymer supporting frame, mounting a first device in a first device placement mouth frame to form a first packaging layer, forming a first circuit layer and a second circuit layer, forming a second conductive copper pillar layer and a second sacrificial copper pillar layer, forming a second insulating layer on the first circuit layer, and forming a third insulating layer on the second circuit layer, forming a second device placement mouth frame vertically overlapped with the first device placement mouth frame, mounting a second device and a third device in the second device placement mouth frame to form a second packaging layer, forming a third circuit layer on the second insulating layer. A terminal of the second device and a terminal of the third device are respectively communicated with the third circuit layer.

An apparatus includes a printed circuit board. The printed circuit board includes at least one conductive layer on top a first dielectric layer, wherein the at least one conductive layer comprises at least one of a ground plane and a power plane. The printed circuit board includes a second dielectric layer on top of the at least one conductive layer. The printed circuit board includes a thermal pad on top of the second dielectric layer. The printed circuit board is fabricated by forming at least one plated through hole for electrically coupling the thermal pad to the at least one conductive layer. The printed circuit board is fabricated by backdrilling the at least one plated through hole to remove a portion of the conductive material, wherein subsequent to the backdrilling the conductive material remaining in the at least one plated through hole electrically couples one or more of the at least one conductive layer to the thermal pad.

There are provided a printed circuit board including: an insulation layer in which a via hole is formed; vias formed in the via hole; first circuit patterns formed below the insulation layer and electrically connected to the vias; and second circuit patterns formed on the insulation layer to be bonded to the vias; wherein the via has a diameter smaller than that of the via hole, and a method of manufacturing a printed circuit board.

A circuit board and an electronic package using the same are provided. The circuit board includes a rigid board body, at least one bendable extension portion, connecting members, and shielding members. The rigid board body includes conductive layers and dielectric layers therebetween. The extension portion is connected to a side of the rigid board body and formed by layers of the conductive layers and at least one layer of the dielectric layers extending outside the rigid board body. The connecting members are arranged on a connecting end of the extension portion and electrically connected to a signal layer of the conductive layers. The shielding members are arranged around the corresponding connecting members and electrically connected to a ground layer of the conductive layers. The connecting members and the shielding members protrude from the connecting end. A height of the shielding members is lower than a height of the connecting members.

A semiconductor integrated circuit device (101) includes a component built-in board (21) in which at least a first core layer (Co21) on which a first electronic component (C21) is mounted, a second core layer (Co22) on which a second electronic component (C22) is mounted, an adhesive layer (Ad21) arranged between the first core layer (Co21) and the second core layer (Co22), and wiring layers (L21-L28) are stacked; a third electronic component (SoC) mounted in a first core layer (Co21) side of the component built-in board (21) and electrically connected to at least one of the first and second electronic components (C21, C22) through the wiring layers (L21 to L28); and an external connection terminal (BE) formed in a second core layer (Co22) side of the component built-in board (21) and electrically connected to at least one of the first and second electronic components (C21, C22).

A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.