Patent classifications
H05K2201/0175
Transmission Line Capacitor and Circuit Board Including the Same Embedded Within
A surface mount transmission line capacitor can have excellent high frequency performance characteristics. The surface mount transmission line capacitor can include a monolithic substrate having a surface, a first electrode formed over the surface, a second electrode arranged over the first electrode, a dielectric layer arranged between the first electrode and second electrode, a first terminal layer exposed along the surface of the substrate and electrically connected with the first electrode, and a second terminal layer exposed along the surface of the substrate and electrically connected with the second electrode. The first terminal layer and the second terminal layer can be contained within a perimeter of the surface of the monolithic substrate.
PRINTED WIRING BOARD
A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.
Ceramic copper circuit board and method for manufacturing the same
A ceramic copper circuit board according to an embodiment includes a ceramic substrate and a first copper part. The first copper part is bonded at a first surface of the ceramic substrate via a first brazing material part. The thickness of the first copper part is 0.6 mm or more. The side surface of the first copper part includes a first sloped portion. The width of the first sloped portion is not more than 0.5 times the thickness of the first copper part. The first brazing material part includes a first jutting portion jutting from the end portion of the first sloped portion. The length of the first jutting portion is not less than 0 μm and not more than 200 μm. The contact angle between the first jutting portion and the first sloped portion is 65° or less.
Manufacturing method of carrier structure
A manufacturing method of a carrier structure includes: A build-up circuit layer is formed on a carrier. The build-up circuit layer includes at least one first circuit layer, at least one first dielectric layer, a second circuit layer, a second dielectric layer, and a plurality of conductive vias. The first circuit layer is located on the carrier and includes at least one first pad, which is disposed relative to at least one through hole of the carrier. The first dielectric layer is located on the first circuit layer. The second circuit layer is located on the first dielectric layer and includes at least one second pad. The second dielectric layer is located on the second circuit layer and includes at least one opening exposing the second pad. The conductive via penetrates the first dielectric layer and is electrically connected to the first circuit layer and the second circuit layer.
METHOD FOR COATING A DEVICE AND DEVICES HAVING NANOFILM THEREON
A device includes a printed circuit board assembly having a printed circuit board and one or more electronic components disposed on the printed circuit board, and a nanofilm disposed on the printed circuit board assembly. The nanofilm includes an inner coating in contact with the printed circuit board assembly, the inner coating including metal oxide nanoparticles having a particle diameter in a range of 5 nm to 100 nm; and an outer coating in contact with the inner coating, the outer coating including silicon dioxide nanoparticles having a particle diameter in a range of 0.1 nm to 10 nm.
METHOD FOR COATING DEVICE AND RESULTING DEVICE
A method includes steps of forming an inner coating on an object and forming an outer coating in contact with the inner coating. A first solution including metal oxide nanoparticles and a first solvent is applied onto the object. The first solvent is removed to form the inner coating with the metal oxide nanoparticles. A second solution having silicon dioxide nanoparticles and a second solvent is applied onto the object. The second solvent is removed to form the outer coating with the silicon dioxide nanoparticles. The interfacial binding force between the metal oxide nanoparticles and the silicon dioxide nanoparticles is then strengthened, for example, by applying a third solution such as water, ethanol or a mixture thereof to the inner coating and the outer coating.
Low dielectric substrate for high-speed millimeter-wave communication
A low dielectric substrate for high-speed millimeter-wave communication includes a quartz glass cloth with a dielectric loss tangent of 0.0001 to 0.0015 and a dielectric constant of 3.0 to 3.8 at 10 GHz, and an organic resin with a dielectric loss tangent within 80% to 150% of the dielectric loss tangent of the quartz glass cloth at 10 GHz and a dielectric constant within 50% to 110% of the dielectric constant of the quartz glass cloth at 10 GHz. This provides a low dielectric substrate for high-speed millimeter-wave communication where the low dielectric substrate makes it possible to send signals that are stable and have excellent quality with no difference in propagation time between wirings even if the substrate has an uneven resin distribution and the quartz glass cloth above and below the wirings, and the difference in dielectric loss tangent between members has been reduced to lower transmission loss.
CERAMIC BOARD WITH MEMORY FORMED IN THE CERAMIC
The present disclosure is directed to a ceramic substrate that includes a plurality of contact pads, a plurality of electrical traces, and a microelectromechanical die. Contacts on the die are coupled to the plurality of contact pads through the plurality of electrical traces. The substrate also includes a plurality of memory bits formed directly on the substrate. Each memory bit is coupled between a first one of the contact pads and a second one of the contact pads.
Camera module having a soldering portion coupling a driving device and a circuit board
A camera module of an embodiment may comprise: a first holder in which a filter is mounted; a lens barrel that is provided to be vertically movable in a first direction with respect to the first holder; a lens operating device that comprises a terminal and moves the lens barrel in the first direction; a first circuit board that is disposed under the first holder and on which an image sensor is mounted; a soldering portion for electrically connecting the terminal of the lens operating device to the first circuit board; and a coupling reinforcement portion that is disposed to face the soldering portion and couples the lens operating device and the first circuit board.
Thin film capacitor, circuit board incorporating the same, and thin film capacitor manufacturing method
Disclosed herein a thin film capacitor that includes a lower electrode layer, an upper electrode layer, and a dielectric layer disposed between the lower electrode layer and the upper electrode layer. The dielectric layer has a through hole. The upper electrode layer has a connection part connected to the lower electrode layer through the through hole and an electrode part insulated from the connection part by a slit. A surface of the lower electrode layer that contacts the connection part through the through hole includes an annular area positioned along an inner wall surface of the through hole and a center area surrounded by the annular area. The annular area is lower in surface roughness than the center area.