Patent classifications
H05K2201/09136
TOPOGRAPHY-BASED DEPOSITION HEIGHT ADJUSTMENT
A method for mounting a component (100) on a workpiece (106), the method comprising obtaining information regarding a surface topography of at least one of a mounting surface (102) of the component and a local surface (108) of the workpiece onto which the component is to be mounted. The method further comprises forming a plurality of deposits (110) of a viscous medium on at least one of the mounting and local surfaces, wherein each of the plurality of deposits has a height (/½, /½, h3) based on the obtained information, and is formed by individually applying at least one droplet (234) of the viscous medium (232) using non-contact dispensing. The method further comprises placing the component on the substrate, such that the plurality of deposits of viscous medium forms a connection between the component and the workpiece.
PRINTED CIRCUIT BOARD
A printed circuit board includes: a core portion including a cavity in one surface thereof; first and second penetration holes disposed in a bottom surface of the cavity and penetrating through the core portion; an electronic component disposed in the cavity; and an insulating material filling the cavity and each of the first and second penetration holes, wherein a sidewall of the cavity is higher than the electronic component.
Manufacturing method of circuit carrier board structure
A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.
Panel level fabrication of package substrates with integrated stiffeners
Techniques are disclosed for forming a package substrate with integrated stiffener. A panel of package substrates are provided. An adhesion layer is then formed on each package substrate of the panel of package substrates. A panel of stiffeners are then attached to the panel of package substrates by the adhesion layer, each stiffener corresponding to a respective package substrate. The panel of package substrates is then singulated into individual package substrates with integrated stiffeners. The stiffeners on the singulated package substrates include tabs that extend to the edges of the package substrates.
Multilayered substrate and method of manufacturing the same
A multilayered substrate includes unit substrates laminated in a direction of thickness thereof, and the unit substrates include a photosensitive insulating layer, a conductive pattern disposed in the photosensitive insulating layer, and a bump penetrating into the photosensitive insulating layer and providing an interlayer connection to the conductive pattern.
Circuit Board Having an Asymmetric Layer Structure
A circuit board is described which includes a layer composite with at least one dielectric layer which includes a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto, and which includes a layer thickness along a z-axis which is perpendicular with respect to the x-axis and to the y-axis; and at least one metallic layer which is attached to the dielectric layer in a planar manner. The layer composite along the z-axis is free from a symmetry plane which is oriented in parallel with respect to the xy-plane, and the dielectric layer includes a dielectric material which has an elastic modulus E in a range between 1 and 20 GPa and along the x-axis and along the y-axis a coefficient of thermal expansion in a range between 0 and 17 ppm/K. A method of manufacturing such a circuit board is also described. Further, a method of manufacturing a circuit board structure comprising two asymmetric circuit boards and a method of manufacturing two processed asymmetric circuit boards from a larger circuit board structure is described.
SemiFlexible Printed Circuit Board With Embedded Component
A circuit board and a method of manufacturing a circuit board or two circuit boards are illustrated and described. The circuit board includes (a) a dielectric layer with a planar extension in parallel with respect to an xy-plane which is spanned by an x-axis and a y-axis perpendicular thereto and a layer thickness along a z-direction which is perpendicular with respect to the x-axis and to the y-axis; (b) a metallic layer which is attached to the dielectric layer in a planar manner; and (c) a component which is embedded in the dielectric layer and/or in a dielectric core-layer of the circuit board. The dielectric layer includes a dielectric material which has (i) an elastic modulus E in a range between 1 and 20 GPa and (ii) a coefficient of thermal expansion in a range between 0 and 17 ppm/K along the x-axis and along the y-axis.
Component built-in board and method of manufacturing the same, and mounting body
A component built-in board comprises a multi-layer structure comprising a plurality of unit boards stacked therein a plurality of electronic components built in thereto in a stacking direction. The plurality of unit boards include: a first board having a first insulating layer and comprising an opening in which the electronic component is housed; and an intermediate board adjacent to the first board and comprising a first adhesive layer provided on at least a side of the first board of a second insulating layer. The intermediate board includes a first wiring layer formed at a position overlapping in the stacking direction a gap between an inner periphery of the opening and an outer periphery of the electronic component of the first board on a surface on the first board side of the second insulating layer.
ELECTRONIC DEVICE
An electronic device includes: a resin substrate that includes insulation resin on which wiring made of conductive material is provided; a heat-generation element that is a circuit element mounted on a first surface of the resin substrate, and is operated to generate heat; and a sealing resin that is provided on the first surface, and seals the heat-generation element. An opposite surface of the sealing resin opposite to a surface of the sealing resin in contact with the first surface is thermally connected to a heat radiation member and mounted on the heat radiation member. Each of the resin substrate and the sealing resin has a bend shape convex toward the opposite surface when each of surrounding temperatures is a normal temperature and has a linear expansion coefficient for maintaining a bend shape convex toward the opposite surface when each of the surrounding temperatures is a high temperature.
Opening in the Pad for Bonding Integrated Passive Device in InFO Package
A package includes a conductive pad, with a plurality of openings penetrating through the conductive pad. A dielectric layer encircles the conductive pad. The dielectric layer has portions filling the plurality of openings. An Under-Bump Metallurgy (UBM) includes a via portion extending into the dielectric layer to contact the conductive pad. A solder region is overlying and contacting the UBM. An integrated passive device is bonded to the UBM through the solder region.