An electronic device including a substrate, a first metal pattern, a first insulating pattern, and a second metal pattern is provided. The first metal pattern is disposed on the substrate. The first insulating pattern is disposed on the first metal pattern. The second metal pattern is disposed on the first metal pattern and the first insulating pattern. The second metal pattern includes a first contact portion and a second contact portion. In a cross-sectional view, the first contact portion and the second contact portion are in contact with the first metal pattern, and the first insulating pattern is in contact with the first metal pattern and the second metal pattern between the first contact portion and the second contact portion.

An integrated circuit (IC) device may include a first substrate having an inductor ground plane in a conductive layer of the first substrate. The integrated circuit may also include a first inductor in a passive device layer of a second substrate that is supported by the first substrate. A shape of the inductor ground plane may substantially correspond to a silhouette of the first inductor.

A reinforcing member for a flexible printed wiring board allows a ground wiring pattern of the flexible printed wiring board to conduct with an external ground potential. The reinforcing member includes a metal base and a nickel layer formed on a surface of the metal base. The nickel layer includes phosphorus in a range from 5.0 percent by mass to 20.0 percent by mass, the rest of the nickel layer is nickel and inevitable impurities, and the nickel layer is 0.2 μm to 0.9 μm thick.

An IC package, an electronic assembly, and methods of preventing warpage of components of an electronic assembly during fabrication of the electronic assembly are shown. An IC package including an adhesive disposed at or near at least one of four corners of a die of the IC package is shown. An electronic assembly including an IC package that includes an adhesive disposed at or near at least one of four corners of a second surface of a first substrate is shown. Methods of preventing warpage of components of an electronic assembly during fabrication of the electronic assembly that include applying an adhesive to at least one of four corners of a first surface of a first component are shown.

The object of the present invention is to provide a printed circuit board that improves the heat radiating effect as the entire printed circuit board and a manufacturing method for such a printed circuit board. A printed circuit board includes a base member having two main surfaces, at least one heat-radiating conductor layer formed on at least one of the main surfaces of the two main surfaces of the base member and a solder resist layer formed on a surface of the heat-radiating conductor layer, and in this printed circuit board, the heat-radiating conductor layer has two main surfaces and at least one side face, the heat-radiating conductor layer has its one main surface of the two main surfaces made in planar contact with the main surface of the base member, the solder resist layer further has an etching liquid resistance, and is formed on the other main surface of the two main surfaces of the heat-radiating conductor layer, with the side face of the heat-radiating conductor layer being exposed, and the heat-radiating conductor layer and the solder resist layer are allowed to form a laminate 24 having a substantially convex shape with an appropriate height.

A welding quality processing method and device, and a circuit board. The method includes: obtaining warpage data of each circuit board layer in a multi-layer circuit board under a preset welding temperature change curve; performing simulation according to a stacked state of the multi-layer circuit board and the warpage data to generate a warpage level of each region in the multi-layer circuit board in the stacked state; and processing the multi-layer circuit board according to the warpage level.

A mounting device for mounting electronic components, wherein the mounting device comprises an electrically conductive structure having a first value of thermal expansion in at least one pre-defined spatial direction, an electrically insulating structure having a second value of thermal expansion in the at least one pre-defined spatial direction being different from the first value and being arranged on the electrically conductive structure, and a thermal expansion adjustment structure having a third value of thermal expansion in the at least one pre-defined spatial direction, wherein the third value is selected and the thermal expansion adjustment structure is located so that thermally induced warpage of the mounting device resulting from a difference between the first value and the second value is at least partially compensated by the thermal expansion adjustment structure.

A laminate substrate for receiving a semiconductor chip. Included are laminate layers stacked to form the laminate substrate, each laminate layer includes a core that includes particle-filled epoxy and a metallic layer on the core. At least one laminate layer has a radial cut through the metallic layer, the radial cut extending from a periphery of the at least one laminate layer towards a center of the at least one laminate layer. The radial cut cuts only through the metallic layer and does not cut through the core.

The disclosure relates to systems, methods and devices for mitigating warpage in printed circuit boards (PCBs) high-frequency connect PCBs (HFCPs), or additively manufactured electronics (AME) with surface mounted chip packages (SMT) during reflow processing for soldering the SMT to the PCB, HFCP, or AME. More specifically, the disclosure is directed to the fabrication of a surface-complementary dielectric mask, or reflow compression mask to substantially encapsulate the SMT, and mitigate warpage, and/or protect the PCB, HFCP, or AME during shipment and further manipulation or processing.

Voids are introduced in a copper shape to reduce warpage experienced by a printed circuit board during a reflow process. Copper shapes on an outer layer of a printed circuit board may be used to connect large packages that include ball grid arrays to the printed circuit board. The copper shapes may induce warpage in the printed circuit board during the reflow process. Routing a mesh pattern of voids in the copper shapes may reduce solder ball joint cracking and pad cratering during reflow and make solder joints more reliable. The voids may make the copper shapes less ridged and change the copper heat dissipation profile to remove sharp warpage forces that cause solder joints to experience pad cratering. The voids may be 8 mil×8 mil cuts or indentations in the copper shape.