A die package is disclosed through which power domains within the chip may be isolated by removing vias within the package substrate, rather than power gating. Multiple substrate options may be configured without specific vias. This eliminates the need to design power gating circuitry into the die, freeing up that die area for more functional logic. The solution allows the die package to retain the same pinout for use by PCB designers, regardless of which power domains are gated.

A printed circuit board and an antenna module including the same are provided. The printed circuit board includes a core layer; a first build-up structure disposed on an upper side of the core layer, including first insulating layers and first bonding layers, alternately stacked, and further including first wiring layers disposed on upper surfaces of the first insulating layers, respectively, and embedded in the first bonding layers, respectively; and a second build-up structure disposed on a lower side of the core layer, including second insulating layers and second bonding layers, alternately stacked, and further including second wiring layers disposed on lower surfaces of the second insulating layers, respectively, and embedded in the second bonding layers, respectively. The printed circuit board has a through-portion penetrating through the core layer and the second build-up structure, and has a region in which the through-portion is disposed as a flexible region.

A circuit structure for hot-press bonding includes a first substrate, a second substrate and a conductive adhesive layer. The circuit structure further includes a first conductive layer having a plurality of connection electrodes arranged on the first substrate, a second conductive layer including a plurality of backup electrodes respectively corresponding to the connection electrodes, an insulating layer arranged between the first conductive layer and the second conductive layer, and a plurality of conductive via arranged in the insulating layer and connected to corresponding connection electrodes and backup electrodes to provide current conduction paths therebetween, thus provide additional conduction path for the connection electrodes even the connection electrodes have fracture and enhance yield and connection reliability.

A computing device has a motherboard circuit substrate having at least a first layer of electrical interconnects, a socket arranged to receive a main processor for the computing device, the socket electrically coupled to at least a portion of the first layer of electrical interconnects, at least two interposer substrates between the main processor and the socket such that the interposer substrate electrically connects to the main processor and the socket, wherein the interposer substrate has a first set of interconnects that electrically connect between the socket and the first layer of electrical interconnects, at least two peripheral circuits on each interposer substrate, the peripheral circuit connected to the main processor through a second set of interconnects on the interposer substrate that connects to the main processor without connecting to the socket or the motherboard circuit substrate, wherein each interposer substrate is folded to allow each peripheral circuit to have an equal path length between the peripheral circuit and the main processor, wherein the at least two interposer substrates are stacked such that the at least two peripheral circuits on each interposer substrate are stacked with the at least two peripheral circuits on another of the at least two interposer substrates.

Provided is an electronic component mounting structure and method for mounting electronic components on the side of a printed circuit board by means of simple fabrication and enlarging the surface area for mounting electronic components. A cut face of a conductive plating layer, which is obtained by cutting along a via in which a conductive plating layer covering an inner wall face of a via hole is electrically connected to a conductive pattern layer of the printed circuit board, is exposed at a cut end face and used as a land pattern which is solder-connected to a mount connecting portion of the electronic component. The end face at which the land pattern is exposed is a surface parallel to the side of the printed circuit board, and therefore electronic components can be mounted on the end face parallel to the side.

An electronic control unit has a substrate that includes a terminal connection portion that is a through hole that extends through the substrate from a first surface to a second surface. A resist opening along an outer edge of the terminal connection portion exposes a circuit pattern from a surface resist layer. A plurality of vias are disposed at positions adjacent to the resist opening in a heat receiving area to facilitate the transfer of heat during a soldering process from the first surface to the second surface.

Disclosed are a hole connecting layer manufacturing method, a circuit board manufacturing method and a circuit board. The hole connecting layer manufacturing method comprises: adhering a first insulating dielectric layer, used for laminating and filling, to a daughter board; laminating and solidifying the first insulating dielectric layer on the daughter board; adhering a second insulating dielectric layer, used for laminating and filling, to the first insulating dielectric layer which has been laminated and solidified; manufacturing a first receiving hole on the first insulating dielectric layer and a second receiving hole on the second insulating dielectric layer, wherein the first receiving hole and the second receiving hole are provided vertically opposite to each other; filling both the first receiving hole and the second receiving hole with a conductive medium to complete manufacturing of the hole connecting layer.

A display device includes a bracket, a display panel, a first force sensor, and a main circuit board. The display panel is disposed on the bracket. The first force sensor is disposed between the display panel and the bracket, the first force sensor being adjacent to a first edge of the display panel. The main circuit board is disposed below the bracket such that the bracket is disposed between the display panel and the main circuit board. The bracket includes a first hole exposing the main circuit board. The first force sensor is connected to the main circuit board through the first hole.

A solution property sensor is provided and has: a substrate, a temperature sensing element, an electrical conductivity sensing element, a pH value sensing element, and a reference electrode. The solution property sensor utilizes different sensing elements to sense various solution properties, and all of these sensing elements can be electrically connected and fixed to conductive patterns on the same substrate, thereby facilitating mass production in the industry or reducing production difficulty.

An embodiment includes generating a sense signal that represents a first vibration of a platform, and reducing a level of the first vibration by generating, in response to the sense signal, a second vibration in the platform. For example, a sensor generates a sense signal representing a first vibration induced (e.g., a shock-induced vibration) in the platform. And a vibration-cancel circuit reduces or eliminates a level of the first vibration in response to the sense signal. For example, the vibration-cancel circuit reduces a magnitude of a first vibration induced in a platform, or eliminates the first vibration altogether, by generating, in the platform, a second vibration having a magnitude approximately equal to the magnitude of the first vibration and having a phase approximately opposite to the phase of the first vibration. That is, the second vibration cancels the first vibration to reduce the net vibration that the platform experiences.