A ceramic electronic component includes an element body, a first external electrode, and a second external electrode. The element body includes a dielectric, at least one first internal electrode, and at least one second internal electrode laminated over the first internal electrode via the dielectric interposed therebetween. The element body has a top surface, a bottom surface, a pair of side surfaces, a first end surface, and a second end surface, thereby the element body having a generally cuboid shape. The first internal electrode is exposed on the first end surface. The second internal electrode is exposed on the second end surface. The side surfaces of the element body are concavely curved along a longitudinal direction, so that the element body has a longitudinal central part at which a width is less than a width at the end surface. The first external electrode is formed on the first end surface and electrically connected with the first internal electrode. The second external electrode is formed on the second end surface and electrically connected with the second internal electrode.

A filter device includes: a multilayer board including a first dielectric layer, a first wiring layer including a reference electrode to which a reference potential is supplied, and a second dielectric layer positioned between the first dielectric layer and the first wiring layer and having a thickness different from a thickness of the first dielectric layer; a series passive element provided on a series wire electrically connecting a first terminal and a second terminal together; a first parallel wire electrically connecting the series wire and the reference electrode together; and a first parallel passive element provided on the first parallel wire. The first parallel wire includes: a first via penetrating through the first dielectric layer and electrically connected to the first parallel passive element; and a second via penetrating through the second dielectric layer and electrically connecting the first via and the reference electrode together.

An electronic component includes an element body having a dielectric and an inner electrode. The electronic component also includes at least one external electrode. Each external electrode includes a base layer, a plating layer and a covering layer. The base layer is formed on a plurality of surfaces of the element body to have a plurality of faces facing different directions. The base layer is connected to the inner electrode, and contains a metal. The plating layer is formed on a mounting face of the base layer and on a side face of the base layer to which the inner electrode is connected. The covering layer is formed on at least a portion of a face of the base layer, which is opposite to the mounting face of the base layer. A surface of the covering layer is less wettable than a surface of the plating layer by solder.

A multilayer electronic component includes: a capacitor body having first to sixth surfaces, and including first and second internal electrodes; first and second external electrodes including first and second connection portions and first and second band portions; and a connection terminal including first and second land portions disposed on the first and second band portions, respectively, and having first and second cut-out portions, respectively. First and second solder accommodating portions are provided by the first and second cut-out portions in lower portions of the first and second band portions, respectively, and, 0.2≤SA1/BW1≤0.5 and 0.2≤SA2/BW2≤0.5 which in BW1 is an area of the first band portion, SA1 is an area of the first solder accommodating portion, BW2 is an area of the second band portion, and SA2 is an area of the second solder accommodating portion.

An apparatus includes a substrate, a switching device, a capacitor device, a first via, a second via, a third via and a fourth via. The substrate has a first surface and a second surface and includes a plurality of copper layers including M positive copper layers and N negative copper layers. The M positive copper layers and the N negative copper layers are alternated. The switching device is disposed on the first surface and includes a switching positive terminal and a switching negative terminal. The capacitor device is disposed on the first surface and includes a capacitor positive terminal and a capacitor negative terminal, and the capacitor device forms a capacitor area. The projections of the adjacent positive and negative copper layers and the capacitor area on the first surface at least partially overlap with each other.

A multi-layer ceramic electronic component includes: a ceramic body that includes internal electrodes laminated in a first direction, and a pair of main surfaces including a center region facing in the first direction; and a pair of external electrodes connected to the internal electrodes and facing each other in a second direction orthogonal to the first direction, a dimension of the ceramic body in the first direction being 1.1 times or more and 1.6 times or less a dimension of the ceramic body in a third direction orthogonal to the first direction and the second direction, the center region being formed at a center portion of at least one of the pair of main surfaces in the second direction.

A method for printed circuit board design rework utilizing two components in series, the method includes selecting a first chip component and a second chip component for placement on an original land location previously occupied by an original chip component. The method further includes placing the first chip component and the second chip component on a chip component support structure. The method further includes soldering a first end of the first chip component to a first end of the second chip component. Responsive to transferring the first chip component and the second chip component to the original land location, the method further includes soldering a second end of the first chip component to a first land of the original land location. The method further includes soldering a second end of the second chip component to a second land of the original land location.

In one embodiment, the substrate is configured for a semiconductor laser diode and comprises a plurality of substrate layers. The substrate layers include insulating layers and carrier layers, which are thicker. A plurality of electrical contact surfaces, which are configured for the semiconductor laser diode, a laser capacitor and a control chip, are located on an assembling side of a first, uppermost substrate layer, which is an insulating layer. Electrical conductor tracks, which electrically interconnect the contact surfaces, are located on the one hand between the first insulating layer and a second insulating layer, and on the other hand between the second insulating layer and a third substrate layer, which is preferably an insulating layer.

A semiconductor package includes a redistribution substrate having a first surface and a second surface which are opposite to each other, a semiconductor chip mounted on the first surface of the redistribution substrate, an under bump interconnection layer on the second surface of the redistribution substrate, an electronic device mounted on the under bump interconnection layer, and a solder bump disposed on the under bump interconnection layer and horizontally spaced apart from the electronic device. The under bump interconnection layer includes conductive patterns respectively connected to the electronic device and the solder bump, and a passivation layer covering the conductive patterns. The passivation layer includes a plurality of trenches disposed between the electronic device and the solder bump.

In various embodiments, a bonded structure is disclosed. The bonded structure can include an element and a passive electronic component having a first surface bonded to the element and a second surface opposite the first surface. The passive electronic component can comprise a first anode terminal bonded to a corresponding second anode terminal of the element and a first cathode terminal bonded to a corresponding second cathode terminal of the element. The first anode terminal and the first cathode terminal can be disposed on the first surface of the passive electronic component.