A glass wiring board that can be kept from cracking by better preventing concentration of stresses in a glass plate on which a conductor layer including an electrolytic copper plating layer is provided, the wiring board includes: a glass plate; a first metal layer covering at least a part of the glass plate; and a second metal layer covering at least a part of the first metal layer, and the area of the first metal layer in contact with the second metal layer is smaller than the area of the second metal layer facing the first metal layer.

A circuit board with improved heat dissipation function and a method for manufacturing the circuit board are provided. The circuit board includes a heat dissipation substrate, an insulating layer on the heat dissipation substrate, an electronic component, a base layer on the insulating layer, and a circuit layer on the base layer. The heat dissipation substrate includes a phase change structure and a heat conductive layer wrapping the phase change structure. The heat dissipation substrate defines a first through hole. The insulating layer defines a groove for receiving the electronic component. A second through hole is defined in the circuit layer, the base layer, and the insulating layer. A bottom of the second through hole corresponds to the heat conductive layer. A heat conductive portion is disposed in the second through hole.

A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.

A substrate is manufactured by drilling a chip containing groove in a composite inner layer circuit structure, having a component connecting end of a circuit layer protruding from a mounting side wall in the chip containing groove, mounting a chip component in the chip containing groove, and connecting the surface bonding pad to the component connecting end. The chip component in the present invention penetrates at least two circuit layers, and the surface bonding pad is bonded to the component connecting end of the circuit layer directly, reducing the occupied area of the chip component in each one of the circuit layers, and increasing the area for circuit disposing and the possible amount of chip components that may be mounted in the substrate.

An embodiment of the present invention provides a copper foil which comprises a copper layer and an anticorrosive film placed on the copper layer, and has a Young's modulus of 3800 to 4600 kgf/mm.sup.2 and a modulus bias factor (MBF) less than 0.12, wherein the modulus bias factor (MBF) is obtained by formula 1 below.
MBF=(maximum Young's modulus−minimum Young's modulus)/(average Young's modulus)  [Formula 1]

A method for electro-depositing a radioactive material onto a metal substrate is disclosed. This is particularly well-suited for true random number generators. The method includes (a) at least partially masking the metal substrate to expose a metallic surface on the metal substrate; (b) connecting the metal substrate to a cathode of a current source; (c) submersing the exposed metallic surface into a solution containing radioactive metal ions, wherein the solution is connected to an anode of the current source; (d) removing the exposed metallic surface from the solution; (e) removing the solution from the exposed metallic surface; (f) measuring the amount of radioactivity emitted from the exposed metallic surface; and (g) repeating steps (c) through (f) until the amount of radioactivity measured in step (f) is stabilized relative to a previous measurement.

A method for manufacturing a circuit board with narrow conductive traces and narrow spaces between traces includes a base layer and two first wiring layers disposed on opposite surfaces of the base layer. Each first wiring layer includes a first bottom wiring and a first electroplated copper wiring. The first bottom wiring is formed on the base layer. The first bottom wiring includes a first end facing the base layer, a second end opposite to the first end, and a first sidewall connecting the first end and the second end. The first electroplated copper wiring covers the second end and the first sidewall of the first bottom wiring.

An apparatus includes a printed circuit board (PCB), a power component disposed on the PCB, the power component to generate heat, and a multilayered coating disposed over the power component and at least a portion of the PCB to dissipate heat from the power component, the multilayered including: an electrical insulation layer comprising a non-polar compound and disposed on the power component and the at least a portion of the PCB; a chromium layer disposed on the electrical insulation layer; and a copper layer disposed on the chromium layer that is at least 10 microns (μm) thick, the copper layer conformally adhered to a top of the power component and to the PCB.

A true random number generator is presented that includes a CMOS matrix detector with a top surface. A shell is positioned over the top surface, and the shell includes a radiation source and a luminophore or scintillator constructed to emit photons towards the top surface when the luminophore or scintillator is struck by electrons from the radioactive decay of the source of the radiation. The CMOS detector matrix is constructed to detect the photons emitted from the luminophore or scintillator and to produce a signal for the detected photons. The signal is communicated to a processor that produces true random numbers based on the signal from the detected photons.