Provided are a polymer thin-film transistor and a method of fabricating the same. Donor-acceptor copolymer-based field-effect transistors (FETs) have attracted considerable attention from technological and academic perspectives due to their low band gap, high mobility, low cost, easy solution processability, flexibility, and stretchability. Large-area films can be formed through meniscus-guided coating among various solution-processing techniques. 29-Diketopyrrolopyrrole-selenophene vinylene selenophene (29-DPP-SVS) donor-acceptor copolymer-based FETs have already shown excellent performance due to their short π-π stacking distance and strong π-π interaction. Charge carrier mobility of these types of semiconductor materials significantly depends on an applied electric field. Accordingly, detailed analysis of the electric-field dependency of charge carrier mobility is necessary to understand the transport mechanism within the material. Therefore, 29-DPP-S VS-based FETs are fabricated by varying the blade coating (BC) speed of a semiconductor layer. The effect of the BC speed on the electrical characteristics of the FETs is studied through the analysis of electric-field-dependent mobility. The results show that the charge carrier mobility of different FETs depends on the applied electric field and that the type of dependency is Poole-Frenkel. At an optimized BC speed (2 mm s.sup.−1), the device shows maximum zero-field mobility (3.39 cm.sup.2V.sup.−1s.sup.−1) due to the low trap density within the conductive channel.

A structure by which electric-field concentration which might occur between a source electrode and a drain electrode in a bottom-gate thin film transistor is relaxed and deterioration of the switching characteristics is suppressed, and a manufacturing method thereof. A bottom-gate thin film transistor in which an oxide semiconductor layer is provided over a source and drain electrodes is manufactured, and angle θ1 of the side surface of the source electrode which is in contact with the oxide semiconductor layer and angle θ2 of the side surface of the drain electrode which is in contact with the oxide semiconductor layer are each set to be greater than or equal to 20° and less than 90°, so that the distance from the top edge to the bottom edge in the side surface of each electrode is increased.

A conductor of the invention is in a form of a conductive convex portion in a laminated wiring member and includes a conductive material and a liquid repellent, in which the conductive material is in a form of metal particles, the liquid repellent is a fluorine-containing compound adapted to form a self-assembled monomolecular film. The conductor has a surface energy in a range from more than 30 mN/m to 80 mN/m. The conductor of the invention is exemplified by the conductive convex portion in the laminated wiring member and functions as a VIA post in the laminated wiring member.

The present invention discloses a CNFET double-edge pulse JKL flip-flop, comprising a double-edge pulse signal generator, 31 CNFET tubes, 6 NTI gate circuits having the same circuit structure, 6 PTI gate circuits having the same circuit structure as well as the 1.sup.st and 2.sup.nd two-value inverters having the same circuit structure; it features in correct logic functions as well as high-speed and low power consumption.

The invention relates to novel polymers containing repeating units based on benzo[2,1,3]thiadiazole-5,6-dicarboxylic acid bis-ester, monomers and methods for their preparation, their use as semiconductors in organic electronic (OE) devices, especially in organic photovoltaic (OPV) devices, and to OE and OPV devices comprising these polymers.

The disclosure provides a method of manufacturing an organic electronic device, including providing a layered device structure, the layered device structure including a plurality of electrodes and an electronically active region, said providing of the layered device structure including steps of providing an organic semiconducting layer, applying a structuring layer to the organic semiconducting layer, the structuring layer having a first region and a second region, the first region being covered by a layer material, applying a contact improving layer to the structuring layer by depositing at least one of an organic dopant material and an organic dopant-matrix material at least in the first region, depositing a layer material on the contact improving layer at least in the first region, and removing the structuring layer at least in the second region. Furthermore, an organic electronic device is provided.

An object of the present invention is to provide a composition for forming an organic semiconductor film that is excellent in printing properties and makes is possible to prepare an organic thin film transistor excellent in mobility and insulation reliability. Another object of the present invention is to provide an organic thin film transistor, electronic paper, and a display device. The composition for forming an organic semiconductor film of the present invention contains an organic semiconductor material, a phenolic reductant, a polymer compound having a weight-average molecular weight of equal to or greater than 500,000, a surfactant, and an organic solvent having a standard boiling point of equal to or higher than 150° C., in which a ratio of a content of the organic semiconductor material to a content of the polymer compound is 0.02 to 10 based on mass, and a ratio of a content of the phenolic reductant to the content of the polymer compound is 0.1 to 5 based on mass.

Provided is a thin film transistor array substrate, including a gate electrode, a gate insulating layer covering the gate electrode, a semiconductor pattern formed on the gate insulating layer and including a channel region overlapping the gate electrode, a source electrode and a drain electrode formed on the semiconductor pattern and facing each other with a first opening exposing the channel region therebetween, a first protective layer formed on the gate insulating layer to cover the source electrode, the drain electrode and the semiconductor pattern and a metal oxide layer formed along a surface of the first protective layer.

Embodiments herein describe FETs with channels connected on the sides to a metal liner. To avoid the difficulties of connecting the sides of the channels to metal liners for the drain and source regions, the embodiments herein form a male/female contact between the channels and the metal liners. In one embodiment, instead of exposing only the end or side surfaces of the channels, an end knob of the channel is exposed. This knob can include the side surface as well as a portion of the top, bottom, front, and back sides of the channel. As such, when the metal liner is deposited on the knob, this metal forms an electrical connection on all sides of the knob. This male/female connection provides a more reliable and lower resistance connection between the channel and the metal liner than using only the end or side surfaces of the channel.

The present invention relates to organic copolymers and organic semiconducting compositions comprising these materials, including layers and devices comprising such organic semiconductor compositions. The invention is also concerned with methods of preparing such organic semiconductor compositions and layers and uses thereof. The invention has application in the field of printed electronics and is particularly useful as the semiconducting material for use in formulations for organic thin film-transistor (OFET) backplanes for displays, integrated circuits, organic light emitting diodes (OLEDs), photodetectors, organic photovoltaic (OPV) cells, sensors, memory elements and logic circuits.