Patent classifications
H01L21/0206
SUBSTRATE PROCESSING METHOD AND SUBSTRATE PROCESSING APPARATUS
The substrate processing method includes a hydrophilization step of hydrophilizing a surface of a substrate, a processing liquid supplying step of supplying a processing liquid to the hydrophilized surface of the substrate, a processing film forming step in which the processing liquid supplied to the surface of the substrate is solidified or cured to form a processing film on the surface of the substrate, and a peeling step in which a peeling liquid is supplied to the surface of the substrate to peel the processing film from the surface of the substrate. The peeling step includes a penetrating hole forming step in which the processing film is partially dissolved in the peeling liquid to form a penetrating hole in the processing film.
HARD MASK LIFTOFF PROCESSES
A substrate, a first layer disposed on the substrate, and a second layer disposed on the first layer are provided. An opening is etched through the second layer to the first layer. A first portion of the first layer is etched through the opening using a first etchant, to expose a surface of the substrate through the opening. A feature is deposited on the surface of the substrate through the opening. A second portion of the first layer is etched using a gaseous etchant, to release the substrate from the second layer.
METHOD OF MANUFACTURING INTEGRATED CIRCUIT USING ETCHING PROCESS
A method of manufacturing an integrated circuit (IC) device including forming an etching target structure on a substrate, forming an etching mask pattern having an opening on the etching target structure, etching a portion of the etching target structure through the opening to form a first hole in the etching target structure, forming a conductive polymer layer to cover the etching target structure inside the first hole, and etching another portion of the etching target structure through the first hole, in a state in which the etching target structure is covered by the conductive polymer layer inside the first hole, to form a second hole in the etching target structure and extending from the first hole toward the substrate may be provided.
Substrate processing apparatus and substrate processing method
There is provided a substrate processing apparatus, including: a substrate holder configured to hold a substrate with a surface of the substrate on which a concavo-convex pattern is formed oriented upward; a liquid supply unit configured to supply a processing liquid to the substrate held by the substrate holder to form a liquid film at least in a concave portion of the concavo-convex pattern; a heating unit configured to irradiate the substrate held by the substrate holder or the liquid film with a laser beam for heating the liquid film; and a heating controller configured to control the heating unit, wherein the heating controller controls the heating unit to expose the entire concave portion in a depth direction from the processing liquid by irradiating the laser beam onto the substrate or the liquid film from the heating unit.
Methods and systems for cleaning high aspect ratio structures
Embodiments of the present disclosure generally relate to methods and systems for cleaning a surface of a substrate. In an embodiment, a method of processing a substrate is provided. The method includes introducing a substrate to a processing volume of a processing chamber by positioning the substrate on a substrate support. The method further includes flowing a first process gas into the processing volume, the first process gas comprising HF, flowing a second process gas into the processing volume, the second process gas comprising pyridine, pyrrole, aniline, or a combination thereof, and exposing the substrate to the first process gas and the second process gas to remove oxide from the substrate under oxide removal conditions. In another embodiment, a system is provided that includes a processing chamber to process a substrate, and a controller to cause a processing method to be performed in the processing chamber.
Pattern formation method and method for manufacturing a semiconductor device
In a pattern formation method, a photo resist pattern is formed over a target layer to be patterned. An extension material layer is formed on the photo resist pattern. The target layer is patterned by using at least the extension material layer as an etching mask.
Cleaning formulation for removing residues on surfaces
This disclosure relates to a cleaning composition that contains 1) hydroxylamine; 2) a chelating agent; 3) an alkylene glycol; and 4) water. This disclosure also relates to a method of using the above composition for cleaning a semiconductor substrate.
METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
Methods for fabricating a semiconductor structure are disclosed. According to some aspects, a first layer is formed on a substrate, and an etch operation is performed to form an opening extending vertically through the first layer. A thermal treatment is performed on the substrate to remove a residual that residues in the opening when forming the opening. At least an oxygen gas is provided in the thermal treatment to react with the residual at a treatment temperature between 800° C. and 1,300° C.
Semiconductor device and method of manufacturing the same
To improve reliability of a semiconductor device. There are provided the semiconductor device and a method of manufacturing the same, the semiconductor including a pad electrode that is formed over a semiconductor substrate and includes a first conductive film and a second conductive film formed over the first conductive film, and a plating film that is formed over the second conductive film and used to be coupled to an external connection terminal (TR). The first conductive film and the second conductive film contains mainly aluminum. The crystal surface on the surface of the first conductive film is different from the crystal surface on the surface of the second conductive film.
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
A device includes a substrate, a gate structure over the substrate, gate spacers on opposite sidewalls of the gate structure, source/drain structures over the substrate and on opposite sides of the gate structure, and a self-assemble monolayer (SAM) in contact with an inner sidewall of one of the gate spacer and in contact with a top surface of the gate structure.