Patent classifications
H01L21/02068
Metal gate using monolayers
Methods for, and structures formed by, wet process assisted approaches implemented in a replacement gate process are provided. Generally, in some examples, a wet etch process for removing a capping layer can form a first monolayer on the underlying layer as an adhesion layer and a second monolayer on, e.g., an interfacial dielectric layer between a gate spacer and a fin as an etch protection mechanism. Generally, in some examples, a wet process can form a monolayer on a metal layer, like a barrier layer of a work function tuning layer, as a hardmask for patterning of the metal layer.
Apparatus for processing semiconductor wafers, in particular for carrying out a polymers removal process step
An apparatus for processing semiconductor wafers includes at least a wet bench and an automatic handling system of a wafer carrier removably connected thereto. The wet bench includes a first processing tank, a second processing tank and a third processing tank, separated from one another, each processing tank being dedicated to a different chemical, as well as a special cleaning and drying tank for processing the automatic handling system when the wafer carrier has been removed.
Source/drain contact formation methods and devices
A method includes providing a structure that includes a semiconductor substrate, an epitaxial source/drain feature over the semiconductor substrate, and one or more dielectric layers over the epitaxial source/drain feature; etching a hole into the one or more dielectric layer to expose a portion of the epitaxial source/drain feature; forming a silicide layer over the portion of the epitaxial source/drain feature; forming a conductive barrier layer over the silicide layer; and applying a plasma cleaning process to at least the conductive barrier layer, wherein the plasma cleaning process uses a gas mixture including N.sub.2 gas and H.sub.2 gas and is performed at a temperature that is at least 300° C.
UV cleaning device of glass substrate
The present invention provides an UV cleaning device of a glass substrate, comprising a lamp box, an UV lamp positioned above inside the lamp box, a transparent shield positioned under the UV lamp, a humidifier positioned under the transparent shield and a power exhaust device under the transparent shield and opposite to the humidifier; in usage, the glass substrate is conveyed to be inside the lamp box, and UV light generated by the UV lamp irradiates on the glass substrate through the shield to clean the glass substrate and a humidity and an oxygen content inside the lamp box are adjusted with the humidifier to make a surface of the glass substrate adsorb one layer of water molecules. The electrons generated as the UV light cleans can be gradually conducted and led out with water molecules to effectively restrain the accumulation of the electrostatic to reduce the phenomenon of electrostatic damage, and meanwhile, the increase of the oxygen content makes the concentration of the activated oxygen atoms increases along with. Accordingly, the result of cleaning the organic objects with the UV light is promoted.
Method of forming conductive feature including cleaning step
A method of forming a semiconductor device includes forming a first conductive feature on a bottom surface of an opening through a dielectric layer. The forming the first conductive feature leaves seeds on sidewalls of the opening. A treatment process is performed on the seeds to form treated seeds. The treated seeds are removed with a cleaning process. The cleaning process may include a rinse with deionized water. A second conductive feature is formed to fill the opening.
Devices having inhomogeneous silicide schottky barrier contacts
A method of fabricating Schottky barrier contacts for an integrated circuit (IC). A substrate including a silicon including surface is provided. A plurality of transistors are formed on the silicon including surface in at least one PMOS region and at least one NMOS region, where the plurality of transistors include at least one exposed p-type surface region and at least one exposed n-type surface region. Pre-silicide cleaning removes oxide from the exposed p-type surface regions and exposed n-type surface regions. A plurality of metals are deposited including Yb and Pt to form at least one metal layer on the substrate. The metal layer is heated to induce formation of an inhomogeneous silicide layer including both Ptsilicide and Ybsilicide on the exposed p-type and exposed n-type surface regions. Unreacted metal of the metal layer is stripped.
Semiconductor device and fabrication method thereof
A semiconductor device and a fabrication method thereof are provided. The semiconductor device includes a semiconductor structure, a dielectric layer, a metal-semiconductor compound film and a cover layer. The semiconductor structure has an upper surface and a lateral surface. The dielectric layer encloses the lateral surface of the semiconductor structure and exposes the upper surface of the semiconductor structure. The metal-semiconductor compound film is on the semiconductor structure, wherein the dielectric layer exposes a portion of a surface of the metal-semiconductor compound film. The cover layer encloses the portion of the surface of the metal-semiconductor compound film exposed by the dielectric layer, and exposes the dielectric layer.
Method of Producing Transition Metal Dichalcogenide Layer
Method of producing one or more transition metal dichalcogenide (MX.sub.2) layers on a substrate, comprising the steps of: obtaining a substrate having a surface and depositing MX.sub.2 on the surface using ALD deposition, starting from a metal halide precursor and a chalcogen source (H.sub.2X), at a deposition temperature of about 300° C. Suitable metals are Mo and W, suitable chalcogenides are S, Se and Te. The substrate may be (111) oriented. Also mixtures of two or more MX.sub.2 layers of different compositions can be deposited on the substrate, by repeating at least some of the steps of the method.
Treating copper interconnects
Techniques relate to treating metallic interconnects of semiconductors. A metallic interconnect is formed in a layer. A metallic cap is disposed on top of the metallic interconnect. Any metallic residue, formed during the disposing of the metallic cap, is converted into insulating material.
METHODS AND APPARATUS FOR CLEANING SUBSTRATES
The present invention discloses a method for cleaning substrate without damaging patterned structure on the substrate using ultra/mega sonic device, comprising: applying liquid into a space between a substrate and an ultra/mega sonic device; setting an ultra/mega sonic power supply at frequency f.sub.1 and power P.sub.1 to drive said ultra/mega sonic device; after micro jet generated by bubble implosion and before said micro jet generated by bubble implosion damaging patterned structure on the substrate, setting said ultra/mega sonic power supply at frequency f.sub.2 and power P.sub.2 to drive said ultra/mega sonic device; after temperature inside bubble cooling down to a set temperature, setting said ultra/mega sonic power supply at frequency f.sub.1 and power P.sub.1 again; repeating above steps till the substrate being cleaned.