The present disclosure provides a semiconductor device and a method of manufacturing a semiconductor device. The method of manufacturing a semiconductor device includes: providing a substrate that includes an array region and an edge region; forming a composite layer on the substrate, where the composite layer includes an amorphous silicon layer and a silicon dioxide layer, and the silicon dioxide layer is located on a surface of the amorphous silicon layer away from the substrate; dry etching the silicon dioxide layer in the array region by using first plasma, to expose a part of the surface of the amorphous silicon layer in the array region; performing, by using second plasma, a plasma surface treatment on an exposed part of the surface of the amorphous silicon layer; cleaning an amorphous silicon layer on which the plasma surface treatment has been performed and a dry etched silicon dioxide layer; and coating a first photoresist layer on the composite layer in the edge region and the array region of the substrate, and performing exposing and developing.

A method for cleaning a substrate is provided. The method includes following operations. A substrate is received. The substrate has a plurality of conductive nanoparticles disposed over a surface of the substrate. A first mixture is applied to remove the conductive nanoparticles. The first mixture includes an SC1 solution, DI water and O.sub.3. A second mixture is applied to the photomask substrate. The second mixture includes DI wafer and H.sub.2. A temperature of the second mixture is between approximately 20° C. and 40° C. The applying of the second mixture further includes a mega sonic agitation, and a frequency of the mega sonic agitation is greater than 3 MHz. A flow rate of the first mixture is between approximately 1000 ml/min and approximately 5000 ml/min. A flow rate of the second mixture is between 1000 ml/min and approximately 3000 ml/min.

The present disclosure provides an integrated circuit (IC) structure. The IC structure includes a semiconductor substrate; an interconnection structure formed on the semiconductor substrate; and a redistribution layer (RDL) metallic feature formed on the interconnection structure. The RDL metallic feature further includes a barrier layer disposed on the interconnection structure; a diffusion layer disposed on the barrier layer, wherein the diffusion layer includes metal and oxygen; and a metallic layer disposed on the diffusion layer.

A method for forming a gate structure includes forming a trench within an interlayer dielectric layer (ILD) that is disposed on a semiconductor substrate, the trench exposing a top surface of the semiconductor substrate, forming an interfacial layer at a bottom of the trench, forming a dielectric layer within the trench, forming a work function metal layer on the dielectric layer, forming an in-situ nitride layer on the work function metal layer in the trench, performing a first cobalt deposition process to form a cobalt layer within the trench, performing a second cobalt deposition process to increase a thickness of the cobalt layer within the trench, and performing an electrochemical plating (ECP) process to fill the trench with cobalt.

Methods for forming a semiconductor structure are described. The method includes cleaning a substrate to form a substrate surface substantially free of oxide, exposing the substrate surface to a first molybdenum precursor, and exposing the substrate surface to a reactant to selectively deposit a first molybdenum film on the substrate surface. The method may be performed in a processing chamber without breaking vacuum. The method may also include forming one or more of a cap layer and a liner and annealing the substrate. The method may also include depositing a second molybdenum film on the substrate surface.

The water outlet of a subsystem that includes an ultraviolet oxidation device and the water inlet of each substrate treatment device are connected to each other via a main pipe. A hydrogen peroxide removal device is installed between the ultraviolet oxidation device of the subsystem and a non-regenerative ion-exchange device. In addition, a carbon dioxide supply device is installed at the middle of a pipe that branches from the water outlet of the subsystem to reach the substrate treatment device. According to an aspect, the hydrogen peroxide removal device is filled with a platinum-group metal catalyst. Thus, ultrapure water passed through the ultraviolet oxidation device is used as a base to produce carbonated water in which the concentration of hydrogen peroxide dissolved therein is limited to 2 μg/L or less and to which carbon dioxide is added to adjust resistivity to be within the range of 0.03 to 5.0 MΩ.Math.cm.

The present disclosure provides example embodiments relating to conductive features, such as metal contacts, vias, lines, etc., and methods for forming those conductive features. In an embodiment, portions of an adhesion layer, barrier layer and/or seed layer is protected by a layer of an organic mask material as portions of the adhesion layer, barrier layer and/or seed layer are removed. The layer of organic mask material is modified to improve its resistance to penetration by wet etchants used to remove exposed portions of the adhesion layer, barrier layer and/or seed layer. An example modification includes treating the layer of organic mask material with a surfactant that is absorbed into the layer of organic mask material.

A method for cleaning contacts on a substrate incorporates ion control to selectively remove oxides. The method includes exposing the substrate to ions of an inert gas, supplying a first RF frequency of a first bias power supply to a substrate support, supplying a second RF frequency of a second bias power supply to a substrate support, and adjusting a first power level of the first RF frequency and a second power level of the second RF frequency to selectively remove oxide from at least one contact on the substrate while inhibiting sputtering of polymer material wherein the oxide removal is selective over removal of polymer material surrounding the at least one contact.

A fin field effect transistor device structure includes a fin structure formed over a substrate. The fin field effect transistor device structure also includes a source/drain epitaxial structure formed over the fin structure. The fin field effect transistor device structure also includes a contact structure with a concave top surface formed over the source/drain epitaxial structure. The fin field effect transistor device structure also includes a barrier layer conformally wrapped around the contact structure. The fin field effect transistor device structure also includes a via structure formed over the contact structure. The concave top surface of the contact structure is below the top surface of the barrier layer.

Methods and apparatuses for processing substrates, such as during metal silicide applications, are provided. In one or more embodiments, a method of processing a substrate includes depositing an epitaxial layer on the substrate, depositing a metal silicide seed layer on the epitaxial layer, and exposing the metal silicide seed layer to a nitridation process to produce a metal silicide nitride layer from at least a portion of the metal silicide seed layer. The method also includes depositing a metal silicide bulk layer on the metal silicide nitride layer and forming or depositing a nitride capping layer on the metal silicide bulk layer, where the nitride capping layer contains a metal nitride, a silicon nitride, a metal silicide nitride, or a combination thereof.