A semiconductor device includes semiconductor nanostructures disposed over a substrate, a source/drain epitaxial layer in contact with the semiconductor nanostructures, a gate dielectric layer disposed on and wrapping around each channel region of the semiconductor nanostructures, a gate electrode layer disposed on the gate dielectric layer and wrapping around each channel region, and insulating spacers disposed in spaces, respectively. The spaces are defined by adjacent semiconductor nanostructures, the gate electrode layer and the source/drain region. The source/drain epitaxial layer includes multiple doped SiGe layers having different Ge contents and at least one of the source/drain epitaxial layers is non-doped SiGe or Si.

According to one embodiment, a substrate processing apparatus includes a batch type cleaning unit, a holding unit, and a single-substrate type drying unit. The batch type cleaning unit simultaneously cleans a plurality of substrates in a batch process with a first liquid. The holding unit receives the cleaned substrates while still wet and then keeps a first surface of each of the substrates wet with the first liquid. The single-substrate type drying unit is configured to receive the substrates one by one from the holding unit and then dry off the substrates one by one.

The film-forming method of forming a target film on a substrate includes preparing the substrate including a first material layer formed on a surface of a first region, and including a second material layer, which is different from the first material, formed on a surface of a second region; controlling the temperature of the substrate to a first temperature; forming the self-assembled film on a surface of the first material layer at the first temperature by supplying a raw-material gas for a self-assembled film; controlling the temperature of the substrate to a second temperature higher than the first temperature; and further forming a self-assembled film at the second temperature on the first material layer on which the self-assembled film has been formed at the first temperature by supplying the raw-material gas for the self-assembled film.

A method includes: providing a first gate electrode over the substrate; forming a first pair of spacers on two sides of the first gate electrode; removing the first gate electrode to form a first trench between the first pair of spacers; depositing a dielectric layer in the first trench; depositing a first layer over the dielectric layer; removing the first layer from the first trench; and depositing a work function layer over the dielectric layer in the first trench.

Aspects of the present disclosure relate to methods, systems, and apparatus for conducting a radical treatment operation on a substrate prior to conducting an annealing operation on the substrate. In one implementation, a method of processing semiconductor substrates includes pre-heating a substrate, and exposing the substrate to species radicals. The exposing of the substrate to the species radicals includes a treatment temperature that is less than 300 degrees Celsius, a treatment pressure that is less than 1.0 Torr, and a treatment time that is within a range of 8.0 minutes to 12.0 minutes. The method includes annealing the substrate after the exposing of the substrate to the species radicals. The annealing includes exposing the substrate to molecules, an anneal temperature that is 300 degrees Celsius or greater, an anneal pressure that is within a range of 500 Torr to 550 Torr, and an anneal time that is less than 4.0 minutes.

Methods of removing native oxide layers and depositing dielectric layers having a controlled number of active sites on MEMS devices for biological applications are disclosed. In one aspect, a method includes removing a native oxide layer from a surface of the substrate by exposing the substrate to one or more ligands in vapor phase to volatize the native oxide layer and then thermally desorbing or otherwise etching the volatized native oxide layer. In another aspect, a method includes depositing a dielectric layer selected to provide a controlled number of active sites on the surface of the substrate. In yet another aspect, a method includes both removing a native oxide layer from a surface of the substrate by exposing the substrate to one or more ligands and depositing a dielectric layer selected to provide a controlled number of active sites on the surface of the substrate.

A method for forming a fin field effect transistor device structure includes forming a fin structure over a substrate. The method also includes forming a gate structure across the fin structure. The method also includes growing a source/drain epitaxial structure over the fin structure. The method also includes depositing a first dielectric layer surrounding the source/drain epitaxial structure. The method also includes forming a contact structure in the first dielectric layer over the source/drain epitaxial structure. The method also includes depositing a second dielectric layer over the first dielectric layer. The method also includes forming a hole in the second dielectric layer to expose the contact structure. The method also includes etching the contact structure to enlarge the hole in the contact structure. The method also includes filling the hole with a conductive material.

This disclosure relates to a cleaning composition that contains 1) hydroxylamine; 2) a chelating agent; 3) an alkylene glycol; and 4) water. This disclosure also relates to a method of using the above composition for cleaning a semiconductor substrate.

A method for manufacturing a semiconductor memory includes: providing a portion to be processed, and performing a preset process step on the portion to be processed at least after a minimum waiting time; before performing the preset process step, performing a thermal oxidation process on the portion to be processed; and before performing the preset process step, performing a cleaning process, the cleaning process being used to remove oxides from the surface of the portion to be processed, the oxides being wholly or partly generated by the thermal oxidation process.

In some embodiments, the present disclosure relates to a process tool that includes a chamber housing defining a processing chamber. Within the processing chamber is a wafer chuck configured to hold a substrate. Further, a bell jar structure is arranged over the wafer chuck such that an opening of the bell jar structure faces the wafer chuck. A plasma coil is arranged over the bell jar structure. An oxygen source coupled to the processing chamber and configured to input oxygen gas into the processing chamber.