H01L21/0331

Array substrate and manufacturing method for the same

An array substrate and a manufacturing method therefor. The method comprises: patterning a first metal layer by means of a first photomask so as to form a gate electrode (21) and a first conductor (22) which are arranged at an interval; patterning a semiconductor layer (40) and a gate insulating layer (30) by means of a second photomask so as to form a through hole (23) which Is exposed out of the first conductor (22); patterning the semiconductor layer (40) by means of the gate electrode (21) and the first conductor (22) so as to form a first channel region (43) and a second channel region (44) which are arranged at an interval; and patterning a second metal layer by means of a third photomask so as to form a source electrode (51), a drain electrode (52) and a second conductor (53) which are arranged at intervals, wherein the second conductor (53) is in contact with the first conductor (22) via the through hole (23). By means of the manufacturing method for the array substrate, the semiconductor layer (40) and the gate insulating layer (30) are patterned by means of a photomask, so that the production costs of the array substrate are reduced, bridging between the first conductor (22) and the second conductor (53) is realized using a relatively simple method, and the production efficiency of the array substrate is further improved.

Semiconductor chip device

According to various embodiments, a method may include: forming a first layer on a surface using a first lift-off process; forming a second layer over the first layer using a second lift-off process; wherein the second lift-off process is configured such that the second layer covers at least one sidewall of the first layer at least partially.

Method and structure for thin-film fabrication
12165922 · 2024-12-10 ·

The present invention relates to the epitaxial lift-off of thin-films allowing the reuse of the expensive semiconductor substrates. In particular, it describes a structure and a method for epitaxial lift-off of several thin films from a single substrate (100) using a plurality of dissimilar sacrificial layers (101), strained layers (102, 104), and/or device or component layers (103). The properties of the sacrificial layers (101) and the strained layers (102,104) can be used (i) to facilitate the lift off process, (ii) to control the point of time of release of each released thin film individually and (iii) to aid in separation and sorting of the released thin films. The released device or component layers can comprise various useful structures, such as optoelectronic devices photonic components.

REACTIVE ION ETCHING ASSISTED LIFT-OFF PROCESSES FOR FABRICATING THICK METALLIZATION PATTERNS WITH TIGHT PITCH

Lift-off methods for fabricating metal line patterns on a substrate are provided. For example, a method to fabricate a device includes forming a sacrificial layer on a substrate and forming a photoresist mask over the sacrificial layer, isotropically etching a portion of the sacrificial layer exposed through an opening of the photoresist mask to form an undercut region in the sacrificial layer below the photoresist mask, wherein the undercut region defines an overhang structure, and anisotropically etching a portion of the sacrificial layer exposed through the opening of the photoresist mask to form an opening through the sacrificial layer down to the substrate. Metallic material is deposited to cover the photoresist mask and to at least partially fill the opening formed in the sacrificial layer without coating the overhang structure with metallic material. The sacrificial layer is dissolved to lift-off the metallic material covering the photoresist mask.

Reactive ion etching assisted lift-off processes for fabricating thick metallization patterns with tight pitch

Lift-off methods for fabricating metal line patterns on a substrate are provided. For example, a method to fabricate a device includes forming a sacrificial layer on a substrate and forming a photoresist mask over the sacrificial layer, isotropically etching a portion of the sacrificial layer exposed through an opening of the photoresist mask to form an undercut region in the sacrificial layer below the photoresist mask, wherein the undercut region defines an overhang structure, and anisotropically etching a portion of the sacrificial layer exposed through the opening of the photoresist mask to form an opening through the sacrificial layer down to the substrate. Metallic material is deposited to cover the photoresist mask and to at least partially fill the opening formed in the sacrificial layer without coating the overhang structure with metallic material. The sacrificial layer is dissolved to lift-off the metallic material covering the photoresist mask.

REACTIVE ION ETCHING ASSISTED LIFT-OFF PROCESSES FOR FABRICATING THICK METALLIZATION PATTERNS WITH TIGHT PITCH

Lift-off methods for fabricating metal line patterns on a substrate are provided. For example, a method to fabricate a device includes forming a sacrificial layer on a substrate and forming a photoresist mask over the sacrificial layer, isotropically etching a portion of the sacrificial layer exposed through an opening of the photoresist mask to form an undercut region in the sacrificial layer below the photoresist mask, wherein the undercut region defines an overhang structure, and anisotropically etching a portion of the sacrificial layer exposed through the opening of the photoresist mask to form an opening through the sacrificial layer down to the substrate. Metallic material is deposited to cover the photoresist mask and to at least partially fill the opening formed in the sacrificial layer without coating the overhang structure with metallic material. The sacrificial layer is dissolved to lift-off the metallic material covering the photoresist mask.

ARRAY SUBSTRATE AND MANUFACTURING METHOD FOR THE SAME

An array substrate and a manufacturing method therefor. The method comprises: patterning a first metal layer by means of a first photomask so as to form a gate electrode (21) and a first conductor (22) which are arranged at an interval; patterning a semiconductor layer (40) and a gate insulating layer (30) by means of a second photomask so as to form a through hole (23) which Is exposed out of the first conductor (22); patterning the semiconductor layer (40) by means of the gate electrode (21) and the first conductor (22) so as to form a first channel region (43) and a second channel region (44) which are arranged at an interval; and patterning a second metal layer by means of a third photomask so as to form a source electrode (51), a drain electrode (52) and a second conductor (53) which are arranged at intervals, wherein the second conductor (53) is in contact with the first conductor (22) via the through hole (23). By means of the manufacturing method for the array substrate, the semiconductor layer (40) and the gate insulating layer (30) are patterned by means of a photomask, so that the production costs of the array substrate are reduced, bridging between the first conductor (22) and the second conductor (53) is realized using a relatively simple method, and the production efficiency of the array substrate is further improved.

SEMICONDUCTOR WAFER AND METHOD

In an embodiment, a method includes forming an adhesion promotion layer on at least portions of a conductive surface arranged on a Group III nitride-based semiconductor layer, applying a resist layer to the adhesion promotion layer such that regions of the conductive surface are uncovered by the adhesion promotion layer and the resist layer, applying by electroplating a conductive layer to the regions of the conductive surface uncovered by the adhesion promotion layer and the resist layer, and removing the resist layer and removing the adhesion promotion layer.

Process for the transfer of at least a portion of a composite film onto a flexible polymer membrane

Process for the transfer of a composite film onto a flexible polymer membrane in which the composite film comprises a matrix made of thermoplastic polymer and particles. This process comprises the following operations: 1) the movement of the membrane into a position in which it closes up, in a way leaktight to a fluid, an opening of a reservoir and a first zone of its front face is directly in contact on an external face of the composite film, 2) the heating of the composite film, so as to soften it, then 3) when the composite film is softened, a fluid inside the reservoir uniformly compresses the first zone against the external face of the composite film in order to adhesively bond this first zone to this external face, then 4) the movement of the membrane to a retracted position in order to separate, from the rigid substrate, the portion of the composite film adhesively bonded to the first zone.

Semiconductor wafer and method

In an embodiment, a method includes forming an adhesion promotion layer on at least portions of a conductive surface arranged on a Group III nitride-based semiconductor layer, applying a resist layer to the adhesion promotion layer such that regions of the conductive surface are uncovered by the adhesion promotion layer and the resist layer, applying by electroplating a conductive layer to the regions of the conductive surface uncovered by the adhesion promotion layer and the resist layer, and removing the resist layer and removing the adhesion promotion layer.