Two classes of cyclic tin compounds, trioxa-aza-1-stannabicyclo-[3.3.3]-undecanes, also referred to as stannatranes, and tetraaza-1-stannabicyclo-[3.3.3] undecanes, also referred to as azastannatranes, are described, as are methods for their preparation. These cyclic tin compounds are resistant to rearrangement and the generation of dialkyltin impurities is not observed during the synthesis, purification or deposition of these compounds to form oxostannate films.

An organic light emitting diode (OLED) display includes: a substrate; an organic light emitting diode formed on the substrate; a metal oxide layer formed on the substrate and covering the organic light emitting diode; a first inorganic layer formed on the metal oxide layer and covering a relatively larger area than the metal oxide layer; a first organic layer formed on the first inorganic layer and covering a relatively smaller area than the first inorganic layer; and a second inorganic layer formed on the first organic layer, covering a relatively larger area than the first organic layer, and contacting the first inorganic layer at an edge of the second inorganic layer.

A hard mask layer is deposited on a feature layer over a substrate. The hard mask layer comprises an organic mask layer. An opening in the organic mask layer is formed using a first gas comprising a halogen element at a first temperature greater than a room temperature to expose a portion of the feature layer. In one embodiment, a gas comprising a halogen element is supplied to a chamber. An organic mask layer on an insulating layer over a substrate is etched using the halogen element at a first temperature to form an opening to expose a portion of the insulating layer.

A method of processing substrates, in one example microelectronic workpieces, is disclosed that includes forming a multi-layer metal hard mask (MHM) layer in which at least one lower layer of the multi-layer MHM is comprised of ruthenium (Ru). The Ru MHM layer may be an atomic layer deposition (ALD) Ru MHM layer formed over one or more underlying layers on a substrate. The ALD Ru MHM layer may be etched to provide a patterned ALD Ru MHM layer, and then the one or more underlying layers may be etched using, at least in part, the patterned ALD Ru MHM layer as a mask to protect portion of the one or more underlying layers. In one embodiment, at least one of the underlying layers is a hard mask layer.

The object is to provide a mask blank substrate, a mask blank, and a transfer mask which can achieve easy correction of a wavefront by a wavefront correction function of an exposure apparatus. The further object is to provide methods for manufacturing them.

A virtual surface shape, which is an optically effective flat reference surface shape defined by a Zernike polynomial, is determined, wherein the Zernike polynomial is composed of only terms in which the order of variables related to a radius is second or lower order and includes one or more terms in which the order of the variables related to a radius is second-order; and the mask blank substrate, in which difference data (PV value) between the maximum value and the minimum value of difference shape between a virtual surface shape and a composite surface shape obtained by composing respective surface shapes of two main surfaces is 25 nm or less, is selected.

A method for fabricating a semiconductor arrangement is provided. The method includes forming a first dielectric layer and forming a first semiconductive layer over the first dielectric layer. The first semiconductive layer is patterned to form a patterned first semiconductive layer. The first dielectric layer is patterned using the patterned first semiconductive layer to form a patterned first dielectric layer. A second semiconductive layer is formed over the patterned first dielectric layer and the patterned first semiconductive layer.

Tin oxide films are used as spacers and hardmasks in semiconductor device manufacturing. In one method, tin oxide layer (e.g., spacer footing) needs to be selectively etched in a presence of an exposed silicon-containing layer, such as SiOC, SiON, SiONC, amorphous silicon, SiC, or SiN. In order to reduce damage to the silicon-containing layer the process involves passivating the silicon-containing layer towards a tin oxide etch chemistry, etching the tin oxide, and repeating passivation and etch in an alternating fashion. For example, passivation and etch can be each performed between 2-50 times. In one implementation, passivation is performed by treating the substrate with an oxygen-containing reactant, activated in a plasma, and the tin oxide etching is performed by a chlorine-based chemistry, such as using a mixture of Cl.sub.2 and BCl.sub.3.

A method for forming a semiconductor device structure is provided. The method includes forming a first spacer over a substrate. The method includes partially removing the first spacer to form a gap dividing the first spacer into a first part and a second part. The method includes forming a filling layer covering a first top surface and a first sidewall of the first spacer. The filling layer and the first spacer together form a strip structure. The method includes forming a second spacer over a second sidewall of the strip structure. The method includes forming a third spacer over a third sidewall of the second spacer. The third spacer is narrower than the second spacer.

Provided is a silicon-containing layer forming composition for forming a silicon-containing layer which exhibits an anti-reflective function during exposure in a multilayer resist process and, during dry etching, shows a high etching rate against a plasma of fluorine-based gas and a low etching rate against a plasma of oxygen-based gas. The silicon-containing layer forming composition includes a polysiloxane compound having a structural unit of the formula: [(R.sup.1).sub.bR.sup.2.sub.mSiO.sub.n/2] and a solvent. In the formula, R.sup.1 is a group represented by the following formula:

##STR00001##

(where a is an integer of 1 to 5; and a wavy line means that a line which the wavy line intersects is a bond); R.sup.2 is each independently a hydrogen atom, a C.sub.1-C.sub.3 alkyl group, a phenyl group, a hydroxy group, a C.sub.1-C.sub.3 alkoxy group or a C.sub.1-C.sub.3 fluoroalkyl group; b is an integer of 1 to 3; m is an integer of 0 to 2; n is an integer of 1 to 3; and a relationship of b+m+n=4 is satisfied.

A method includes depositing a metallic hardmask over a dielectric layer. The method further includes etching a metallic hardmask opening in the metallic hardmask to expose a top surface of the dielectric layer. The method further includes modifying a sidewall of the metallic hardmask opening by adding non-metal atoms into the metallic hardmask. The method further includes depositing a conductive material in the metallic hardmask opening.