The invention is a special designed pattern heterogeneous substrate, which is epitaxially deposited on a heterogeneous substrate by two step growth, and a thermal cycle annealing is added to reduce the lattice mismatch between the layers and the difference in thermal expansion coefficient, thereby obtaining a better stress. The quality of the semiconductor epitaxial layer is improved, and the present invention can easily grasp the timing of stress release when the semiconductor is grown on the heterogeneous substrate, avoid cracks in the semiconductor epitaxial layer, and form a crack free zone in the middle of the semiconductor epitaxial layer.

An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×10.sup.17 atoms/cm.sup.3.

An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×10.sup.17 atoms/cm.sup.3.

Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.

Discontinuous bonds for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a first substrate and a second substrate, with at least one of the first substrate and the second substrate having a plurality of solid-state transducers. The second substrate can include a plurality of projections and a plurality of intermediate regions and can be bonded to the first substrate with a discontinuous bond. Individual solid-state transducers can be disposed at least partially within corresponding intermediate regions and the discontinuous bond can include bonding material bonding the individual solid-state transducers to blind ends of corresponding intermediate regions. Associated methods and systems of discontinuous bonds for semiconductor devices are disclosed herein.

A method for manufacturing a semiconductor device includes the steps of forming a fixing layer, coupling a third substrate different from the first substrate and the second substrate to the fixing layer, separating the semiconductor thin film layer from the first substrate by moving the third substrate away from the base material substrate with the third substrate coupled to the coupling region, and bonding the semiconductor thin film layer to the second substrate after separation from the base material substrate, wherein the forming the fixing layer forms the fixing layer having a thickness such lhat a crack is generated between the fixing layer formed on the first substrate and the fixing layer formed on a side surface of the semiconductor thin film layer by a force for moving the third substrate.

A method for manufacturing a semiconductor device includes the steps of forming a fixing layer, coupling a third substrate different from the first substrate and the second substrate to the fixing layer, separating the semiconductor thin film layer from the first substrate by moving the third substrate away from the base material substrate with the third substrate coupled to the coupling region, and bonding the semiconductor thin film layer to the second substrate after separation from the base material substrate, wherein the forming the fixing layer forms the fixing layer having a thickness such lhat a crack is generated between the fixing layer formed on the first substrate and the fixing layer formed on a side surface of the semiconductor thin film layer by a force for moving the third substrate.

A process for collectively fabricating a plurality of semiconductor structures comprises providing a substrate including a carrier having a main face, a dielectric layer on the main face of the carrier and a plurality of crystalline semiconductor growth islands on the dielectric layer. At least one crystalline semiconductor active layer is formed on the growth islands. After the step of forming the active layer, trenches are formed in the active layer and in the growth islands in order to define the plurality of semiconductor structures.

A method and device for bonding a first substrate with a second substrate inside a sealed bonding chamber. The method includes: a) fixing of the first and second substrates, b) arranging of the first and second substrates, c) mutual approaching of the first and second substrates, d) contacting the first and second substrates at respective bond initiation points, e) generating a bonding wave running from the bond initiation points to side edges of the substrates, and f) influencing the bonding wave during course of the bonding wave, wherein targeted influencing of the bonding wave takes place by a regulated and/or controlled change of pressure inside the bonding chamber.

A laser annealing apparatus (1) according to the embodiment includes: a laser beam source (11) configured to emit a laser beam (L1) to crystallize an amorphous silicon film (101a) on a substrate (100) and to form a poly-silicon film (101b); a projection lens (13) configured to condense the laser beam to irradiate a silicon film (101); a probe beam source configured to emit a probe beam (L2); a photodetector (25) configured to detect the probe beam (L3) transmitted through the silicon film (101), a processing apparatus (26) configured to calculate a standard deviation of detection values of a detection signal output from the photodetector, and to determine a crystalline state of the crystallized film based on the standard deviation.