A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.

A layer of amorphous silicon is formed on a germanium-on-insulator substrate, or a layer of germanium is formed on a silicon-on-insulator substrate. An anneal is then performed which causes thermal mixing of silicon and germanium atoms within one of the aforementioned structures and subsequent formation of a silicon germanium-on-insulator material.

Embodiments of the invention are directed to methods and resulting structures for forming a storage element using phase change memory (PCM). In a non-limiting embodiment of the invention, a PCM layer is formed over a surface of a bottom electrode. A top electrode is formed over the PCM layer using a tone inversion process that includes a sacrificial layer. A PCM pillar is then formed by patterning the PCM layer to expose a surface of the bottom electrode. The tone inversion process enables a sub-50 nm PCM pillar diameter.

Some embodiments relate to a method for forming a semiconductor device. The method includes forming a source region of a field effect transistor structure in a semiconductor substrate. The method further includes forming an oxide layer. The method also includes incorporating atoms of at least one atom type of a group of atom types into at least a part of the source region of the field effect transistor structure after forming the oxide layer. The group of atom types includes chalcogen atoms, silicon atoms and argon atoms.

Some embodiments relate to a method for forming a semiconductor device. The method includes forming a source region of a field effect transistor structure in a semiconductor substrate. The method further includes forming an oxide layer. The method also includes incorporating atoms of at least one atom type of a group of atom types into at least a part of the source region of the field effect transistor structure after forming the oxide layer. The group of atom types includes chalcogen atoms, silicon atoms and argon atoms.

The present disclosure generally relate to methods of processing a substrate in an epitaxy chamber. The method includes exposing a substrate having one or more fins to a group IV-containing precursor and a surfactant containing antimony to form an epitaxial film over sidewalls of the one or more fin structures, wherein the surfactant containing antimony is introduced into the epitaxy chamber before epitaxial growth of the epitaxial film, and a molar ratio of the surfactant containing antimony to the group IV-containing precursor is about 0.0001 to about 10.

The present disclosure generally relate to methods of processing a substrate in an epitaxy chamber. The method includes exposing a substrate having one or more fins to a group IV-containing precursor and a surfactant containing antimony to form an epitaxial film over sidewalls of the one or more fin structures, wherein the surfactant containing antimony is introduced into the epitaxy chamber before epitaxial growth of the epitaxial film, and a molar ratio of the surfactant containing antimony to the group IV-containing precursor is about 0.0001 to about 10.

A simultaneous ohmic contact to silicon carbide includes a mixture of platinum, titanium, and silicon compounds deposited on a silicon carbide substrate. The silicon carbide substrate includes an n-type surface and a p-type surface.

Disclosed is a method for separating a substrate (1) along a separation pattern (4), in which method a substrate (1) is provided and an auxiliary layer (3) is applied to the substrate, said layer covering the substrate at least along the separation pattern. The substrate comprising the auxiliary layer is irradiated, such that the material of the auxiliary layer penetrates the substrate along the separation pattern in the form of an impurity. The substrate is broken along the separation pattern. A semiconductor chip (15) is also disclosed.

Disclosed is a method for separating a substrate (1) along a separation pattern (4), in which method a substrate (1) is provided and an auxiliary layer (3) is applied to the substrate, said layer covering the substrate at least along the separation pattern. The substrate comprising the auxiliary layer is irradiated, such that the material of the auxiliary layer penetrates the substrate along the separation pattern in the form of an impurity. The substrate is broken along the separation pattern. A semiconductor chip (15) is also disclosed.