H01L21/26

Testing method of packaging process and packaging structure

A testing method of a packaging process includes following steps. A substrate is provided. A circuit structure is formed on the substrate. The circuit structure includes a real unit area and a dummy side rail surrounding the real unit area, and a plurality of first circuit patterns is disposed on the real unit area. A second circuit pattern is formed on the dummy side rail, and the second circuit pattern emulates the configurations of at least a portion of the first circuit patterns for operating a simulation test. In addition, a packaging structure adapted for a testing process is also mentioned.

Apparatus and methods to remove unbonded areas within bonded substrates using localized electromagnetic wave annealing

An electromagnetic wave irradiation apparatus and methods to bond unbonded areas in a bonded pair of substrates are disclosed. The unbonded areas between the substrates are eliminated by thermal activation in the unbonded areas induced by electromagnetic wave irradiation having a wavelength selected to effect a phonon or electron excitation. A first substrate of the bonded pair of substrates absorbs the electromagnetic radiation and a portion of a resulting thermal energy transfers to an interface of the bonded pair of substrates at the unbonded areas with sufficient flux to cause opposite sides the first and second substrates to interact and dehydrate to form a bond (e.g., SiOSi bond).

Apparatus and methods to remove unbonded areas within bonded substrates using localized electromagnetic wave annealing

An electromagnetic wave irradiation apparatus and methods to bond unbonded areas in a bonded pair of substrates are disclosed. The unbonded areas between the substrates are eliminated by thermal activation in the unbonded areas induced by electromagnetic wave irradiation having a wavelength selected to effect a phonon or electron excitation. A first substrate of the bonded pair of substrates absorbs the electromagnetic radiation and a portion of a resulting thermal energy transfers to an interface of the bonded pair of substrates at the unbonded areas with sufficient flux to cause opposite sides the first and second substrates to interact and dehydrate to form a bond (e.g., SiOSi bond).

High power low pressure UV bulb with plasma resistant coating

An envelope of an ultraviolet (UV) bulb comprises a tube of UV transmissive material configured to contain a UV emissive material and a plasma resistant coating on an inner surface of the tube wherein the coating has been deposited by atomic layer deposition (ALD) and is the only material attached to the inner surface of the tube. The tube can be an endless tube having a circular shape and the coating can be an ALD aluminum oxide coating. The UV transmissive material can comprise quartz or fused silica and the tube can have a wall thickness of about 1 to about 2 mm. The coating can have a thickness of no greater than about 200 nm such as about 120 nm to 160 nm. The circular tube can be formed into a torus shape which can have an outer diameter of about 200 mm and the tube itself can have an outer diameter of about 30 mm. The ALD aluminum oxide coating can be a pinhole free conformal coating. A UV bulb comprising the envelope can contain mercury and inert gas such as argon with pressure inside the UV bulb below 100 Torr. A method of curing a film on a semiconductor substrate, comprises supporting a semiconductor substrate in a curing chamber and exposing a layer on the semiconductor substrate to UV radiation produced by the UV bulb. Other uses include semiconductor substrate surface cleaning or sterilization of fluids and objects.

High power low pressure UV bulb with plasma resistant coating

An envelope of an ultraviolet (UV) bulb comprises a tube of UV transmissive material configured to contain a UV emissive material and a plasma resistant coating on an inner surface of the tube wherein the coating has been deposited by atomic layer deposition (ALD) and is the only material attached to the inner surface of the tube. The tube can be an endless tube having a circular shape and the coating can be an ALD aluminum oxide coating. The UV transmissive material can comprise quartz or fused silica and the tube can have a wall thickness of about 1 to about 2 mm. The coating can have a thickness of no greater than about 200 nm such as about 120 nm to 160 nm. The circular tube can be formed into a torus shape which can have an outer diameter of about 200 mm and the tube itself can have an outer diameter of about 30 mm. The ALD aluminum oxide coating can be a pinhole free conformal coating. A UV bulb comprising the envelope can contain mercury and inert gas such as argon with pressure inside the UV bulb below 100 Torr. A method of curing a film on a semiconductor substrate, comprises supporting a semiconductor substrate in a curing chamber and exposing a layer on the semiconductor substrate to UV radiation produced by the UV bulb. Other uses include semiconductor substrate surface cleaning or sterilization of fluids and objects.

Pyrometer background elimination
10330535 · 2019-06-25 · ·

Embodiments disclosed herein provide an RTP system for processing a substrate. An RTP chamber has a radiation source configured to deliver radiation to a substrate disposed within a processing volume. One or more pyrometers are coupled to the chamber body opposite the radiation source. In one example, the radiation source is disposed below the substrate and the pyrometers are disposed above the substrate. In another example, the radiation source is disposed above the substrate and the pyrometers are disposed below the substrate. The substrate may be supported in varying manners configured to reduce physical contact between the substrate support and the substrate. An edge ring and shield are disposed within the processing volume and are configured to reduce or eliminate background radiation from interfering with the pyrometers. Additionally, an absorbing surface may be coupled to the chamber body to further reduce background radiation interference.

Wafer and wafer defect analysis method
10325823 · 2019-06-18 · ·

A wafer defect analysis method according to one embodiment comprises the steps of: thermally treating a wafer at different temperatures; measuring an oxygen precipitate index of the thermally treated wafer; determining a characteristic temperature at which the oxygen precipitate index is maximized; and discriminating a type of defect region of the wafer depending on the determined characteristic temperature.

Optical emission spectroscopy (OES) for remote plasma monitoring

Methods and systems for etching substrates using a remote plasma are described. Remotely excited etchants are formed in a remote plasma and flowed through a showerhead into a substrate processing region to etch the substrate. Optical emission spectra are acquired from the substrate processing region just above the substrate. The optical emission spectra may be used to determine an endpoint of the etch, determine the etch rate or otherwise characterize the etch process. A weak plasma may be present in the substrate processing region. The weak plasma may have much lower intensity than the remote plasma. In cases where no bias plasma is used above the substrate in an etch process, a weak plasma may be ignited near a viewport disposed near the side of the substrate processing region to characterize the etchants.

HYBRID HIGH-VOLTAGE LOW-VOLTAGE FINFET DEVICE

An integrated circuit includes a plurality of low-voltage FinFET transistors each having a channel length l and a channel width w, the low-voltage FinFET transistors having a first threshold voltage channel implant and a first gate dielectric thickness. The integrated circuit also includes a plurality of high-voltage FinFET transistors each having the channel length l and the channel width w, the high-voltage FinFET transistors having a second threshold voltage channel implant greater than the first threshold voltage channel implant and second gate dielectric thickness greater than the first gate dielectric thickness.

Apparatus and method fabricating semiconductor device

A method of fabricating a semiconductor device include; seating a substrate having a substrate radius on an electrostatic chuck, applying first radio-frequency power to the electrostatic chuck to induce plasma in a region at least above the electrostatic chuck, and generating a magnetic field in the region at least above the electrostatic chuck using a magnet having a ring-shape and disposed above the electrostatic chuck by applying second radio-frequency power to the magnet, wherein the magnet has an inner radius ranging from about one-half to about one-fourth of the substrate radius.