A method of fabricating a semiconductor device include; seating a substrate having a substrate radius on an electrostatic chuck, applying first radio-frequency power to the electrostatic chuck to induce plasma in a region at least above the electrostatic chuck, and generating a magnetic field in the region at least above the electrostatic chuck using a magnet having a ring-shape and disposed above the electrostatic chuck by applying second radio-frequency power to the magnet, wherein the magnet has an inner radius ranging from about one-half to about one-fourth of the substrate radius.

The present application provides a semiconductor structure and a manufacturing method thereof. The method of manufacturing the semiconductor structure includes: providing a base, the base including a substrate and a first dielectric layer on the substrate; forming a through silicon via in the base, the through silicon via penetrating through the first dielectric layer, extending into the substrate, and having a depth less than a thickness of the base; forming an electrically conductive structure in the through silicon via; forming a filling hole in the first dielectric layer and the substrate, the filling hole surrounding the electrically conductive structure, exposing a sidewall of the electrically conductive structure and a part of the substrate, and having a stepwise sidewall; and forming a thermally conductive structure in the filling hole.

The present application provides a semiconductor structure and a manufacturing method thereof. The method of manufacturing the semiconductor structure includes: providing a base, the base including a substrate and a first dielectric layer on the substrate; forming a through silicon via in the base, the through silicon via penetrating through the first dielectric layer, extending into the substrate, and having a depth less than a thickness of the base; forming an electrically conductive structure in the through silicon via; forming a filling hole in the first dielectric layer and the substrate, the filling hole surrounding the electrically conductive structure, exposing a sidewall of the electrically conductive structure and a part of the substrate, and having a stepwise sidewall; and forming a thermally conductive structure in the filling hole.

An assembly present in an ion source for supporting an arc chamber upon a base plate includes a first arc support plate, a first screw, and a second screw. The first screw passes through a smooth through-hole in an arm of the first arc support plate and extends into a bore in the base plate. The second (or adjustable) screw passes through a threaded through-hole in an arm of the first arc support plate and engages an upper surface of the base plate itself, and can be used to change the altitude and angle of the first arc support plate relative to the base plate. This adjustment ability improves the beam quality of the ion source.

An assembly present in an ion source for supporting an arc chamber upon a base plate includes a first arc support plate, a first screw, and a second screw. The first screw passes through a smooth through-hole in an arm of the first arc support plate and extends into a bore in the base plate. The second (or adjustable) screw passes through a threaded through-hole in an arm of the first arc support plate and engages an upper surface of the base plate itself, and can be used to change the altitude and angle of the first arc support plate relative to the base plate. This adjustment ability improves the beam quality of the ion source.

A method for manufacturing a silicon wafer having a denuded zone in a surface layer by performing a heat treatment to a silicon wafer, including: a step A, performing a first rapid heat treatment of 0.01 msec or more and 100 msec or less to an upper surface layer alone of the silicon wafer to be treated at 1300 C. or more and a silicon melting point or less by using a first heat source which heats the silicon wafer to be treated from above; and a step B, holding the silicon wafer to be treated at 1100 C. or more and less than 1300 C. for one second or more and 100 seconds or less by a second rapid heat treatment using a second heat source which heats the silicon wafer to be heated, and decreasing the temperature at a falling rate of 30 C./sec or more and 150 C./sec or less.

A method for manufacturing a silicon wafer having a denuded zone in a surface layer by performing a heat treatment to a silicon wafer, including: a step A, performing a first rapid heat treatment of 0.01 msec or more and 100 msec or less to an upper surface layer alone of the silicon wafer to be treated at 1300 C. or more and a silicon melting point or less by using a first heat source which heats the silicon wafer to be treated from above; and a step B, holding the silicon wafer to be treated at 1100 C. or more and less than 1300 C. for one second or more and 100 seconds or less by a second rapid heat treatment using a second heat source which heats the silicon wafer to be heated, and decreasing the temperature at a falling rate of 30 C./sec or more and 150 C./sec or less.

A method of forming a memory device with a dielectric blocking layer and selective silicidation and the resulting device are provided. Embodiments include forming a memory stack on a substrate; forming a conformal insulating layer over sidewalls and an upper surface of the memory stack and the substrate; forming an interpoly dielectric structure adjacent to each sidewall of the insulating layer; forming a conformal polysilicon silicon layer over the insulating layer and interpoly dielectric structures; forming an optical planarization layer over the polysilicon layer; planarizing the optical planarization and polysilicon layers down to the memory stack; forming a dielectric blocking layer over the memory stack and substrate; forming a patterning stack over the dielectric blocking layer, the patterning stack covering a portion of the memory stack; and removing the dielectric blocking, optical planarization, and polysilicon layers on opposite sides of the patterning stack.

An apparatus includes an ionization chamber and an electron source device at least partially disposed inside the ionization chamber. The ionization chamber is configured to receive at least one chemical and provide plasma having ionized chemicals. The electron source device includes at least one filament configured to generate electrons, and a cathode configured to emit secondary electrons from the front surface when the electrons from the at least one filament hit the back surface of the cathode. The front surface of the cathode is shaped convex facing inside the ionization chamber.

Disclosed is a bipolar semiconductor device, comprising a semiconductor body having a first surface; and a base region of a first doping type and a first emitter region in the semiconductor body, wherein the first emitter region adjoins the first surface and comprises a plurality of first type emitter regions of a second doping type complementary to the first doping type, a plurality of second type emitter regions of the second doping type, a plurality of third type emitter regions of the first doping type, and a recombination region comprising recombination centers, wherein the first type emitter regions and the second type emitter regions extend from the first surface into the semiconductor body, wherein the first type emitter regions have a higher doping concentration and extend deeper into the semiconductor body from the first surface than the second type emitter regions, wherein the third type emitter regions adjoin the first type emitter regions and the second type emitter regions, and wherein the recombination region is located at least in the first type emitter regions and the third type emitter regions.