The present disclosure relates to a method for manufacturing a semiconductor package including vacuum-laminating a non-conductive film on a substrate on which a plurality of through silicon vias are provided and bump electrodes are formed, and then performing UV irradiation, wherein an increase in melt viscosity before and after UV irradiation can be adjusted to 30% or less, whereby a bonding can be performed without voids during thermo-compression bonding, and resin-insertion phenomenon between solders can be prevented, fillets can be minimized and reliability can be improved.

An embodiment of the present disclosure provides a substrate structure applied to a power module. In the substrate structure applied to a power module, the substrate includes an upper substrate and a lower substrate, a plurality of semiconductor devices disposed on the lower substrate, a source signal electrode transmitting a source signal to the semiconductor devices, and a gate signal electrode transmitting a gate signal to the semiconductor devices, one of the source signal electrode or the gate signal electrode is connected to the upper substrate through a conductive column, and a signal transmitted by one of the source signal electrode or the gate signal electrode is transmitted to the semiconductor devices through the upper substrate.

A topological material includes a lattice crystalline structure; and a material defect in the lattice crystalline structure that is treatable by hydrogen passivation that chemically mitigates an electronic charge associated with the material defect. The lattice crystalline structure includes dangling bonds in an atomic arrangement of the material defect of the lattice crystalline structure, and the hydrogen passivation may apply hydrogen to chemically passivate the dangling bonds of the material defect. The hydrogen passivation may be achieved by diffusing hydrogen into common materials of the lattice crystalline structure. The hydrogen passivation may chemically and/or electrostatically neutralize an electronic activity associated with the material defect.

Films are modified to include deuterium in an inductive high density plasma chamber. Chamber hardware designs enable tunability of the deuterium concentration uniformity in the film across a substrate. Manufacturing of solid state electronic devices include integrated process flows to modify a film that is substantially free of hydrogen and deuterium to include deuterium.

A dicing device includes: a workpiece table; a cutting unit including a blade and a spindle; an XY-direction drive unit; a Z-direction drive unit; a first measuring instrument for measuring a Z-direction position of a surface of a workpiece held on a holding surface of the workpiece table; a second measuring instrument for measuring a Z-direction displacement of the holding surface; a correction amount calculation unit for calculating a correction amount for the Z-direction position of the cutting unit based on a table displacement map showing the Z-direction displacement at each position on the holding surface, the Z-direction displacement having been measured in advance by the second measuring instrument and based on the Z-direction position of the surface of the workpiece, measured by the first measuring instrument; and a control unit for controlling, when the workpiece is cut by a blade, the Z-direction drive unit based on the correction amount.

A dicing die attach film including a dicing film and a die attach film laminated on the dicing film, in which the die attach film has an arithmetic average roughness Ra1 of from 0.05 to 2.50 μm at a surface in contact with the dicing film, and a value of ratio of Ra1 to an arithmetic average roughness Ra2 at a surface that is of the die attach film and is opposite to the surface in contact with the dicing film is from 1.05 to 28.00.

A method for manufacturing an ingot block in which an ingot of a silicon single crystal pulled up by a Czochralski process is cut and subjected to outer periphery grinding to manufacture an ingot block of the silicon single crystal, the method including: a step of measuring a radial center position of the ingot at one or more locations along a longitudinal direction of the ingot, a step of setting a reference position at which an offset amount of the measured radial center position of the ingot is equal to or less than a predetermined eccentricity amount, a step of cutting the ingot into the ingot blocks based on the set reference position, and a step of performing outer periphery grinding on each of the cut ingot blocks.

The present disclosure provides systems and methods for processing channel structures of substrates that include positioning the substrate in a first processing chamber having a first processing volume being in fluid communication with a plasma source. The substrate can include a channel structure with high aspect ratio features having aspect ratios greater than about 20:1. The method can also include forming an oxide cap layer over a silicon-containing layer of the channel structure and exposing the oxide cap layer to a hydrogen-or-deuterium radical to nucleate the silicon-containing layer of the channel structures of the substrate. Forming the oxide cap layer and exposing the channel structure with the hydrogen radical occurs in the first processing chamber to form a nucleated substrate. The method can also include positioning the nucleated substrate in a second processing chamber with a second processing volume and heating the nucleated substrate in the second processing chamber.

Films are modified to include deuterium in an inductive high density plasma chamber. Chamber hardware designs enable tunability of the deuterium concentration uniformity in the film across a substrate. Manufacturing of solid state electronic devices include integrated process flows to modify a film that is substantially free of hydrogen and deuterium to include deuterium.

A method of manufacturing a semiconductor device includes preparing a substrate including cell regions and a scribe lane region, forming circuit blocks in the cell regions of the substrate, the substrate including a first surface and a second surface, forming a bias pad on the first surface of the substrate, such that the bias pad is in the scribe lane region of the substrate, bonding a deuterium exchange structure to the second surface of the substrate, implanting deuterium into the deuterium exchange structure using plasma processing, and applying a first voltage to the bias pad, such that the deuterium is diffused from the deuterium exchange structure into the substrate through the second surface of the substrate.