Patent classifications
H01L21/30
Etching method
A method for selectively etching a first region of silicon oxide with respect to a second region of silicon nitride includes a first step of exposing a target object having the first region and the second region to a plasma of a processing gas containing a fluorocarbon gas, etching the first region, and forming a deposit containing fluorocarbon on the first region and the second region. The method further includes a second step of etching the first region by a radical of the fluorocarbon contained in the deposit. In the first step, the plasma is generated by a high frequency power supplied in a pulsed manner. Further, the first step and the second step are repeated alternately.
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME
A semiconductor device includes: a dielectric structure in which etch stop structures and low-k layers are alternately stacked over a substrate; and a metal interconnection electrically connected to the substrate in the dielectric structure, wherein each one of the etch stop structures includes: a first etch stop layer including a hydrogen blocking material; and a second etch stop layer formed over the first etch stop layer.
RESIST PATTERN FORMING METHOD, SEMICONDUCTOR APPARATUS USING SAID METHOD, AND EXPOSURE APPARATUS THEREOF
In immersion exposure, a resist pattern forming method suppressing resist pattern defects comprises mounting a substrate formed a resist film thereon and a reticle formed a pattern thereon onto an exposure apparatus, supplying a first chemical solution onto the resist film to selectively form a first liquid film in a local area on the resist film and draining the solution, the first liquid film having a flow and being formed between the resist film and a projection optical system, transferring the pattern of the reticle to the resist film through the first liquid film to form a latent image, supplying a second chemical solution onto the resist film to clean the resist film, heating the resist film, and developing the resist film to form a resist pattern from the resist film.
RESIST PATTERN FORMING METHOD, SEMICONDUCTOR APPARATUS USING SAID METHOD, AND EXPOSURE APPARATUS THEREOF
In immersion exposure, a resist pattern forming method suppressing resist pattern defects comprises mounting a substrate formed a resist film thereon and a reticle formed a pattern thereon onto an exposure apparatus, supplying a first chemical solution onto the resist film to selectively form a first liquid film in a local area on the resist film and draining the solution, the first liquid film having a flow and being formed between the resist film and a projection optical system, transferring the pattern of the reticle to the resist film through the first liquid film to form a latent image, supplying a second chemical solution onto the resist film to clean the resist film, heating the resist film, and developing the resist film to form a resist pattern from the resist film.
Condition selectable backside gas
Methods of semiconductor processing may include performing a process on a semiconductor substrate. The semiconductor substrate may be seated on a substrate support positioned within a processing region of a semiconductor processing chamber. The methods may include flowing a first backside gas through the substrate support at a first flow rate. The methods may include removing the semiconductor substrate from the processing region of the semiconductor processing chamber. The methods may include performing a plasma cleaning operation within the processing region of the semiconductor processing chamber. The methods may include flowing a second backside gas through the substrate support at a second flow rate. At least a portion of the second backside gas may flow into the processing region through accesses in the substrate support.
Condition selectable backside gas
Methods of semiconductor processing may include performing a process on a semiconductor substrate. The semiconductor substrate may be seated on a substrate support positioned within a processing region of a semiconductor processing chamber. The methods may include flowing a first backside gas through the substrate support at a first flow rate. The methods may include removing the semiconductor substrate from the processing region of the semiconductor processing chamber. The methods may include performing a plasma cleaning operation within the processing region of the semiconductor processing chamber. The methods may include flowing a second backside gas through the substrate support at a second flow rate. At least a portion of the second backside gas may flow into the processing region through accesses in the substrate support.
Method of manufacturing the thin film
The invention disclosed a method of manufacturing the thin film, which belongs to the technological field of SOI wafer manufacture. By growing a layer of dielectric material (silicon oxide) on the provided high-resistivity silicon wafer, then to grow a layer of amorphous silicon on the dielectric material, to transfer a layer of silicon oxide to the amorphous silicon, to make the mono crystalline silicon exist on the oxidation layer, so that a SOI wafer with a layer of amorphous silicon is manufactured. The process above is completed in specific process conditions. The manufactured thin film, e.g. SOI wafer with amorphous silicon layer, is used main for RF apparatus.
Solder bump formation using wafer with ring
At least one circuit element may be formed on a front side of a ringed substrate, and the ringed substrate may be mounted on a mounting chuck. The mounting chuck may have an inner raised portion configured to receive the thinned portion of the substrate thereon, and a recessed ring around a perimeter of the mounting chuck configured to receive the outer ring of the ringed substrate therein. At least one solder bump may be formed that is electrically connected to the at least one circuit element, while the ringed wafer is disposed on the mounting chuck.
Methods to control fin tip placement
A method includes providing a semiconductor structure having a substrate including a longitudinally extending plurality of fins formed thereon. A target layout pattern is determined, which overlays active areas devices disposed on the fins. The target layout pattern includes a first group of sections overlaying devices having more fins than adjacent devices and a second group of sections overlaying devices having less fins than adjacent devices. A first extended exposure pattern is patterned into the structure, and includes extensions that extend sections of the first group toward adjacent sections of the first group. A second extended exposure pattern is patterned into the structure, and includes extensions that extend sections of the second group toward adjacent sections of the second group. Portions of the first and second extended exposure patterns are combined to form a final pattern overlaying the same active areas as the target pattern.
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
A method of manufacturing a semiconductor device includes forming a stack in which first material layers and second material layers are alternately stacked, forming a channel structure passing through the stack, forming openings by removing the first material layers, forming an amorphous blocking layer in the openings, and performing a first heat treatment process to supply deuterium through the openings and substitute hydrogen in the channel structure with the deuterium.