Patent classifications
H01L21/4803
SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.
HEAT DISSIPATION SHEET, MANUFACTURING METHOD OF HEAT DISSIPATION SHEET, AND ELECTRONIC APPARATUS
A heat dissipation sheet includes a first sheet composed of a plurality of first carbon nanotubes, and a second sheet composed of a plurality of second carbon nanotubes, wherein the first sheet and the second sheet are coupled in a stacked state, and the first carbon nanotubes and the second carbon nanotubes are different in an amount of deformation when pressure is applied.
SYSTEMS AND METHODS FOR FORMING PARTIAL NANO-PERFORATIONS WITH VARIABLE BESSEL BEAM
Embodiments of the present disclosure include a optical assembly comprising: an axicon lens with spherical aberration configured to generate the laser beam focal line, an optical element set spaced part from the optical lens, and a focusing optical element spaced apart from the optical element set, wherein the axicon lens and the optical element set are translatable relative to each other along the laser beam propagation direction and wherein the focusing optical element is in a fixed position along the laser beam propagation direction.
MANUFACTURING METHOD OF HOUSING FOR SEMICONDUCTOR DEVICE
Each of a plurality of terminals has a first portion and a second portion being a connection target for a semiconductor element. A manufacturing method of a housing includes a first step arranging, for a lower mold provided with a plurality of holes each of which is a target into which the first portion is inserted, a nest having a third portion covering at least one of the holes, a second step arranging, for the lower mold with the nest being arranged therein, the plurality of terminals by inserting the first portion into the hole not covered by the third portion, a third step arranging an upper mold on the lower mold with the nest and the plurality of terminals being arranged therein, and a fourth step, which is executed after the third step, obtaining the housing by performing resin molding using the lower mold and the upper mold.
Power device embedded driver board assemblies with cooling structures and methods thereof
A driver board assembly includes first and second substrates, one or more power device assemblies and a cooling manifold. At least one jet impingement assembly is formed on a first surface of the first substrate and includes an impingement receiving portion that is at least partially circumferentially surrounded by a plurality of fluid microchannels that extend radially from the impingement receiving portion along the first surface. The second substrate is bonded onto the first substrate. The second substrate surface has a recess. The plurality of receiving contours are etched within the first surface of the first substrate. The one or more power device assemblies are bonded into the recess of the second substrate. A first cooling surface of the cooling manifold is bonded to the first surface such that the first cooling surface bonds within the plurality of receiving contours within the first surface of the first substrate.
TECHNIQUES FOR JOINING DISSIMILAR MATERIALS IN MICROELECTRONICS
Techniques for joining dissimilar materials in microelectronics are provided. Example techniques direct-bond dissimilar materials at an ambient room temperature, using a thin oxide, carbide, nitride, carbonitride, or oxynitride intermediary with a thickness between 100-1000 nanometers. The intermediary may comprise silicon. The dissimilar materials may have significantly different coefficients of thermal expansion (CTEs) and/or significantly different crystal-lattice unit cell geometries or dimensions, conventionally resulting in too much strain to make direct-bonding feasible. A curing period at ambient room temperature after the direct bonding of dissimilar materials allows direct bonds to strengthen by over 200%. A relatively low temperature anneal applied slowly at a rate of 1° C. temperature increase per minute, or less, further strengthens and consolidates the direct bonds. The example techniques can direct-bond lithium tantalate LiTaO.sub.3 to various conventional substrates in a process for making various novel optical and acoustic devices.
SEMICONDUCTOR DEVICE PACKAGE WITH ISOLATED SEMICONDUCTOR DIE AND ELECTRIC FIELD CURTAILMENT
In a described example, an apparatus includes: a lead frame having a first portion and having a second portion electrically isolated from the first portion, the first portion having a side surface normal to a planar opposite surface, and having a recessed edge that is notched or chamfered and extending between the side surface and a planar device side surface; a spacer dielectric mounted to the planar device side surface and partially covered by the first portion, and extending beyond the first portion; a semiconductor die mounted to the spacer dielectric, the semiconductor die partially covered by the spacer dielectric and extending beyond the spacer dielectric; the second portion of the lead frame comprising leads coupled to the semiconductor die by electrical connections; and mold compound covering the semiconductor die, the electrical connections, the spacer dielectric, and partially covering the first portion and the second portion.
SEMICONDUCTOR DEVICE PACKAGE WITH INTEGRAL HEAT SLUG
A described example includes: a heat slug having a board side surface and an opposite top side surface; a package substrate mounted to the heat slug, the package substrate including overhanging leads extending over the board side surface of the heat slug, the package substrate having downset portions including a downset rail that runs along one side of a die mount area; at least one semiconductor device having a backside surface mounted to the board side surface of the heat slug; electrical connections coupling bond pads of the semiconductor device to the overhanging leads of the package substrate and to the downset rail; and mold compound covering the at least one semiconductor device, the electrical connections, a portion of the leads and the board side surface of the heat slug, the top side surface at least partially exposed from the mold compound.
HETEROEPITAXIAL STRUCTURE WITH A DIAMOND HEAT SINK
A heteroexpitaxial structure comprises a substrate having a silicon-on-insulator structure. Applied to one surface of a layer of single-crystal silicon having a (111) surface orientation is a layer of polycrystalline diamond. Formed on the other surface of said layer of (111) surface orientation single-crystal silicon of the silicon-on-insulator structure from which layers of a dielectric and another single-crystal silicon layer are first removed is an epitaxial structure of a semiconductor device based on wide-bandgap III-nitrides.
INTEGRATED CIRCUIT PACKAGES HAVING REDUCED Z-HEIGHT
Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. For example, in some embodiments, a microelectronic assembly may include a substrate having a surface including a first cavity; a first die at least partially nested in the first cavity and electrically coupled to the substrate; and a circuit board having a surface including a second cavity, wherein the surface of the substrate is electrically coupled to the surface of the circuit board, and wherein the first die extends at least partially into the second cavity in the circuit board.