A compounded polymer material that can be laser marked is provided. The compounded polymer material includes an enhancer of nitrides, carbides, silicides, or combinations thereof. Upon forming the compounded polymer material into an article and exposing it to laser radiation, the irradiated portion of the compounded polymer material absorbs the laser radiation, increases in temperature, and forms a mark in the article. A lightness value difference (L) between the mark and the non-irradiated portion of the article has an absolute value of at least 5, and the lightness value difference between the mark and the non-irradiated portion is greater than if the polymer material did not include the enhancer.

An inspection system for a semiconductor package includes an inspection apparatus that includes a stage on which the semiconductor package is loaded, and a computer coupled to the inspection apparatus. The semiconductor package may include a first semiconductor chip and a second semiconductor chip on the first semiconductor chip, the computer may provide first identification information about the first semiconductor chip and second identification information about the second semiconductor chip, and the computer may control the inspection apparatus to selectively perform a package test process on one of the first and second semiconductor chips, the one of the first and second semiconductor chips being identified as a good chip based on the first identification information and the second identification information.

A method comprises the steps of providing a semiconductor device wafer; forming a first plurality of alignment marks on a first side of the semiconductor device wafer; forming a first pattern of a first conductivity type; forming a second plurality of alignment marks on a second side of the semiconductor device wafer; forming a bonded wafer by bonding a carrier wafer to the semiconductor device wafer; forming a third plurality of alignment marks on a free side of the carrier wafer; applying a grinding process; forming a plurality of device structure members; removing the carrier wafer; applying an implanting process and an annealing process; applying a metallization process and applying a singulation process.

A dividing apparatus includes a table having a transparent plate having a holding surface for holding a workpiece thereon and a lower illumination unit for illuminating the holding surface from below, a first storage section for storing a first image including a white portion where illumination light from the lower illumination unit is transmitted through the workpiece and displayed as white and a black portion where the illumination light is blocked by the workpiece and displayed as black when an image of a kerf defined by a dividing unit in the workpiece held on the holding surface is captured by an image capturing unit with the lower illumination unit being energized, and a white pixel detecting section for detecting whether or not there are pixels in the white portion of the first image in directions perpendicular to directions along which a street extends.

A method for semiconductor fabrication includes mounting a wafer onto a first wafer table. The first wafer table includes a first set of pins that support the wafer, the first set of pins having a first pitch between adjacent pins. The method further includes forming a first set of overlay marks on the wafer; and transferring the wafer onto a second wafer table. The second wafer table includes a second set of pins having a second pitch between adjacent pins. The second set of pins are individually and vertically movable, and the second pitch is smaller than the first pitch. The method further includes moving a portion of the second set of pins such that a remaining portion of the second set of pins supports the wafer and the remaining portion has the first pitch between adjacent pins.

A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique identifier.

A method for marking a semiconductor substrate at the die level for providing unique authentication and serialization includes projecting a first pattern of actinic radiation onto a layer of photoresist on the substrate using mask-based photolithography, the first pattern defining semiconductor device structures and projecting a second pattern of actinic radiation onto the layer of photoresist using direct-write projection, the second pattern defining a unique wiring structure having a unique electrical signature.

Multi-operation tools for photovoltaic cell processing are described. In an example, a multi-operation tool includes a conveyor system to move a photovoltaic (PV) cell continuously along a conveyor path through a laser scribing station and an adhesive printing station. Furthermore, the PV cell may be aligned to a laser head of the laser scribing station and a printer head of the adhesive printing station in a single alignment operation prior to being laser scribed and printed with an adhesive in a continuous process.

Embodiments herein include methods, systems, and apparatuses for die screening using inline defect information. Such embodiments may include receiving a plurality of defects, receiving wafersort electrical data for a plurality of dies, classifying each of the defects as a defect-of-interest or nuisance, determining a defect-of-interest confidence for each of the defects-of-interest, determining a die return index for each of the dies containing at least one of the defects-of-interest, determining a die return index cutline, and generating an inking map. Each of the defects may be associated with a die in the plurality of dies. Each of the dies may be tagged as passing a wafersort electrical test or failing the wafersort electrical test. Classifying each of the defects as a defect-of-interest or nuisance may be accomplished using a defect classification model, which may include machine learning. The inking map may be electronically communicated to an inking system.

A method for semiconductor fabrication includes mounting a wafer onto a first wafer table. The first wafer table includes a first set of pins that support the wafer, the first set of pins having a first pitch between adjacent pins. The method further includes forming a first set of overlay marks on the wafer; and transferring the wafer onto a second wafer table. The second wafer table includes a second set of pins having a second pitch between adjacent pins. The second set of pins are individually and vertically movable, and the second pitch is smaller than the first pitch. The method further includes moving a portion of the second set of pins such that a remaining portion of the second set of pins supports the wafer and the remaining portion has the first pitch between adjacent pins.