Patent classifications
H01L21/67288
SYSTEMS AND METHODS FOR SEMICONDUCTOR CHIP SURFACE TOPOGRAPHY METROLOGY
Systems and methods for measuring a surface topography of a semiconductor chip are disclosed. A disclosed system comprises a light source configured to provide low coherent light to a first beam splitter, a scanner configured to use the low coherent light reflected from the first beam splitter to scan positions on a surface of a semiconductor chip, a second beam splitter configured to receive reflected signals from the positions on the surface of the semiconductor chip, a detector configured to detect interference signals from a first output of the second beam splitter, wherein each of the interference signals corresponds to a respective one of the positions, and a spectrometer configured to detect spectrum signals from a second output of the second beam splitter, wherein each of the spectrum signals corresponds to the respective one of the positions.
MONITORING WAFER AND MONITORING SYSTEM
Embodiments of the present application provide a monitoring wafer and a monitoring system. The monitoring wafer comprises a substrate, the substrate having a first surface that is configured to face a wafer carrier and fixed to the wafer carrier; and a pressure detection device, located on the substrate and configured to obtain pressure on the first surface.
Secure inspection and marking of semiconductor wafers for trusted manufacturing thereof
A method for securing and verifying semiconductor wafers during fabrication includes receiving a semiconductor wafer after a layer of features has been patterned thereon. At least one security mark is formed at one or more locations embedded within a backside of the semiconductor wafer by implanting an inert species at the one or more locations. At a subsequent point in fabrication and/or after fabrication of the semiconductor wafer has completed the backside of the wafer is inspected for detection of the at least one security mark. If the at least one security mark is not detected at an expected location within the backside of the semiconductor wafer a determination is made that the semiconductor wafer has been compromised.
Methods and systems for manufacturing printed circuit board based on x-ray inspection
In one embodiment, an X-ray inspection system may nondestructively inspect a printed circuit board to measure a number of dimensions at a number of pre-determined locations of the printed circuit board. The X-ray inspection system may generate a data set for the printed circuit board based on the measured dimensions. The X-ray inspection system may calculate one or more drilling values based on the data set of the printed circuit board. The X-ray inspection system may provide, to a drilling machine, instructions for drilling a number of plated-through vias based on the calculated drilling values for the printed circuit board.
Method and system for map-free inspection of semiconductor devices
A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.
CONTROL OF WAFER BOW DURING INTEGRATED CIRCUIT PROCESSING
A method of controlling wafer bow in an integrated circuit fabrication process may include characterizing the wafer bow in response to performing one or more first fabrication processes to an active side of an integrated circuit wafer. Determining one or more second fabrication processes, to be applied to a back side of the integrated circuit wafer, to bring the wafer bow to below a predetermined threshold based on the one or more first fabrication processes the method may additionally include performing the one or more second fabrication processes on the back side of the integrated circuit wafer.
DETECTING DAMAGED SEMICONDUCTOR WAFERS UTILIZING A SEMICONDUCTOR WAFER SORTER TOOL OF AN AUTOMATED MATERIALS HANDLING SYSTEM
A device may detect a semiconductor wafer to be transferred from a source wafer carrier to a target wafer carrier, and may cause a light source to illuminate the semiconductor wafer. The device may cause a camera to capture images of the semiconductor wafer after the light source illuminates the semiconductor wafer, and may perform image recognition of the images of the semiconductor wafer to determine whether an edge of the semiconductor wafer is damaged. The device may cause the semiconductor wafer to be provided to the source wafer carrier when the edge of the semiconductor wafer is determined to be damaged, and may cause the semiconductor wafer to be provided to the target wafer carrier when the edge of the semiconductor wafer is determined to be undamaged.
CUTTING METHOD FOR CUTTING PROCESSING-TARGET OBJECT AND CUTTING APPARATUS THAT CUTS PROCESSING-TARGET OBJECT
There is provided a cutting method for cutting a processing-target object by a cutting blade. The cutting method includes a holding step of holding the processing-target object by a holding table and a cutting step of cutting the processing-target object by the cutting blade by causing the cutting blade that rotates to cut into the processing-target object held by the holding table and causing the holding table and the cutting blade to relatively move after the holding step is carried out. In the cutting step, cutting is carried out with detection of whether or not a crack in the processing-target object exists by a crack detecting unit disposed on the rear side relative to the cutting blade in a cutting progression direction in which cutting processing of the processing-target object by the cutting blade progresses.
WAFER PROCESSING APPARATUS
A wafer processing apparatus includes an X-θ stage unit having a rotary chuck capable of moving in an X direction and rotating in a θ direction, wherein a wafer is mounted on the rotary chuck and the wafer includes an edge portion adjacent to an edge of the wafer. In addition, the wafer processing apparatus includes: an edge bead removal (EBR) measurement and eccentricity measurement unit which is capable of inspecting a bead removal state of the edge portion of the wafer, and measuring eccentricity between the center of the rotary chuck and the center of the wafer; and an edge exposure of wafer (EEW) process unit which exposes the edge portion of the wafer after correcting the eccentricity between the center of the rotary chuck and the center of the wafer measured by the EBR measurement and eccentricity measurement unit.
APPARATUS FOR TREATING SUBSTRATE AND METHOD FOR TREATING SUBSTRATE
The present invention provides an apparatus for treating a substrate. The apparatus for treating a substrate comprises: a first module; and a treating module configured to treat the substrate, and the first module includes: a load port on which a container having the substrate accommodated therein is placed; a transfer unit having a hand that transfers the substrate between the load port and the treating module; and an observation unit mounted in the transfer unit and configured to observe a state of the substrate accommodated in the container.