A wafer placement table includes a ceramic base, an electrode (FR attraction electrode), a bonding terminal (power supply terminal), and an electrode lead-out portion. The ceramic base has an upper surface serving as a wafer placement surface. The FR attraction electrode is embedded in the ceramic base. The power supply terminal is inserted into the ceramic base from a lower surface of the ceramic base and penetrates a through-hole formed in the FR attraction electrode. The electrode lead-out portion is provided at each of two or more positions at intervals along a peripheral edge of the through-hole to be thicker than the FR attraction electrode and has an inner peripheral surface bonded to a side surface of the power supply terminal.

A member for semiconductor manufacturing apparatus includes a ceramic plate that has an upper surface including a wafer placement surface and resin porous plugs that have upper surfaces that are exposed from the wafer placement surface. The resin porous plugs are press-fitted and secured in plug insertion holes that extend through the ceramic plate in an up-down direction and allow gas to flow.

A film deposition method includes maintaining an inside of a chamber to have a predetermined pressure, cooling a stage, on which the object to be processed mounts, to have an ultralow temperature of −20° C., and mounting the object to be processed on the stage, supplying a gas including a low vapor pressure material gas of a low vapor pressure material into the inside of the chamber, and generating plasma from the supplied gas including the gas of the low vapor pressure material, and causing a precursor generated from the low vapor pressure material by the plasma to be deposited on a recess part of the object to be processed.

In an embodiment, a method includes: receiving, within a processing chamber, a wafer with a photoresist mask above a metal layer, wherein the processing chamber is connected to a gas source; applying an etchant configured to etch the metal layer in accordance with the photoresist mask within the processing chamber; and applying gas from the gas source to perform plasma ashing in the processing chamber.

A lift pin assembly for a lift pin of a plasma processing apparatus is provided. The lift pin assembly includes a pin housing defining an opening into which a lift pin extends. The pin housing is positioned such that the opening is aligned with an opening defined by an electrostatic chuck. The assembly includes a pin height adjustment member partially positioned within the opening defined by the pin housing. The pin height adjustment member is movable along an axis in a first direction and a second direction to move the lift pin into and out of the opening defined by the electrostatic chuck. The assembly includes a pin holder assembly at least partially positioned within an opening defined by the pin height adjustment member. The pin holder assembly is configured to hold the lift pin such that the lift pin is aligned with the opening defined by the electrostatic chuck.

Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.

A substrate fixing device includes: a base plate; and an electrostatic chuck that is fixed to the base plate to adsorb a substrate by electrostatic force. The electrostatic chuck includes: an adsorption layer that is formed of ceramic and that contacts the substrate to adsorb and hold the substrate; a first heating layer that is formed on the adsorption layer and that includes a first electrode; a second heating layer that is formed on the first heating layer and that includes a second electrode; and a via that is provided between the first electrode and the second electrode to electrically connect the first electrode and the second electrode to each other. The via includes a body portion, and an end portion that is connected to the body portion. A diameter of the end portion is larger than that of the body portion.

A body of an electrostatic chuck comprises mesas disposed on a polished surface of the body. Each of the mesas comprises an adhesion layer disposed on the polished surface of the body, a transition layer disposed over the adhesion layer, and a coating layer disposed over the transition layer. The coating layer has a hardness of at least 14 Gpa. The body further comprises a sidewall coating disposed over a sidewall of the body. A method for preparing the body comprises polishing the surface of the body and cleaning the polished surface. The method further comprises depositing the mesas by depositing the adhesion layer on the body, the transition layer over the adhesion layer, and the coating layer over the transition layer. Further, the method includes, polishing the mesas.

The present application discloses a pressure drive system and method, and a semiconductor manufacture apparatus employing the system to perform pressure drive; by importing information of this wafer before a manufacture process initiates, a corresponding safe driving pressure and a corresponding safety threshold for each wafer are acquired and set for pressure control, and an abnormality judgment is performed based on data fed back by a pressure detection module in real time, thereby effectively avoiding a wafer breakage caused when an electrostatic release is abnormal, and the pressures for various wafers under different situations are controllable, and thus, an accuracy of the control is improved; with real-time feedback from the pressure detection module and a pressure regulation module, a wafer breakage, caused when an electrostatic release is abnormal, is effectively avoided.

Disclosed is a joined ceramic body comprising a first ceramic portion comprising a first ceramic, a second ceramic portion comprising a second ceramic, and a joining layer formed between the first ceramic portion and the second ceramic portion. The joining layer has a bond thickness of from 0.5 to 20 um and comprises silicon dioxide having a total impurity content of 20 ppm and less. A method of making the joined ceramic body and a joining material are also disclosed.