A strip of semiconductor devices includes a plurality of leadframes electrically isolated from each other, a plurality of semiconductor chips, and an encapsulation material. Each leadframe has a first surface and a second surface opposite to the first surface. At least one semiconductor chip of the plurality of semiconductor chips is electrically coupled to the first surface of each leadframe. The encapsulation material encapsulates each semiconductor chip and at least portions of each leadframe.

A separating apparatus configured to separate a processing target object into a first separation body and a second separation body includes a first holder configured to hold the first separation body; a second holder configured to hold the second separation body; a moving unit configured to move the first holder and the second holder relatively to each other; and a rotation unit configured to rotate at least one of the first separation body or the second separation body to allow a separation surface of the first separation body or a separation surface of the second separation body to face upwards.

A substrate processing method includes preparing a stacked substrate including a first substrate divided into multiple chips, a protective film divided for each of the multiple chips to protect the chip, a second substrate supporting the first substrate, and an adhesive film configured to attach the protective film and the second substrate; reducing adhesive strength of the adhesive film with a light beam configured to penetrate the second substrate; and picking-up, from the adhesive film by a pick-up device, the chip and the protective film with the reduced adhesive strength to the adhesive film.

A carrier substrate includes a base layer, an antireflection layer, and an energy absorption layer, wherein the antireflection layer is formed on one surface of the base layer and allows an elastic wave generated by a first laser beam transmitted through an element adhesively bonded to the antireflection layer to be transmitted through the base layer without being reflected towards the element, the first laser beam being applied to the element through a source substrate of the element, and the energy absorption layer is formed between the base layer and the antireflection layer to be aligned with the element, and evaporates upon energy absorption.

The method of manufacturing a plurality of semiconductor chips (100) comprises a step A) of providing a semiconductor substrate (1) having a plurality of integrated electronic circuits (2) on a top side (10) thereof. In a step B), a sacrificial layer (3) is applied on one side of the semiconductor substrate. In a step C), holes (30) are introduced in the sacrificial layer so that at least one hole is formed above each electronic circuit. In a step D), the semiconductor substrate is adhered to a carrier (5) with the sacrificial layer at the front, an adhesive layer (4) being used between the sacrificial layer and the carrier, and the adhesive layer filling the holes so that holding elements (40) from the adhesive layer are formed in the holes. In a step E) the semiconductor substrate is thinned. In a step F) separation trenches (6) are introduced between the electronic circuits, which extend from a side of the electronic circuits facing away from the carrier to the sacrificial layer and penetrate the thinned semiconductor substrate. In a step G) the sacrificial layer is removed in the region between the electronic circuits and the carrier.

A semiconductor device, the device including: a first level overlaid by a first memory level, where the first memory level includes a first thinned single crystal substrate; a second memory level, the second memory level disposed on top of the first memory level, where the second memory level includes a second thinned single crystal substrate; and a memory control level disposed on top of the second memory level, where the memory control level is bonded to the second memory level, and where the bonded includes oxide to oxide and conductor to conductor bonding.

The disclosed technology relates generally to a method and system for micro assembling GaN materials and devices to form displays and lighting components that use arrays of small LEDs and high-power, high-voltage, and or high frequency transistors and diodes. GaN materials and devices can be formed from epitaxy on sapphire, silicon carbide, gallium nitride, aluminum nitride, or silicon substrates. The disclosed technology provides systems and methods for preparing GaN materials and devices at least partially formed on several of those native substrates for micro assembly.

A method for producing an electronic device having a drive circuit including a solar cell structure, the method including the steps of: having a first wafer having solar cell structures on a starting substrate and a second wafer having drive circuits formed, so that either one of the first wafer or the second wafer has a plurality of independent diode circuits and capacitor-function laminated portions; obtaining a bonded wafer by bonding so that the solar cell structures, the diode circuits, the capacitor-function laminated portions, and the drive circuits are superimposed; wiring; and dicing the bonded wafer; thus creating a method for producing an electronic device including a drive circuit, a solar cell structure, and a capacitor-function portion in one chip and having a suppressed production cost; and such an electronic device.

A method for wafer bonding includes: providing a semiconductor wafer having a first main face; fabricating at least one semiconductor device in the semiconductor wafer, wherein the semiconductor device is arranged at the first main face; generating trenches and a cavity in the semiconductor wafer such that the at least one semiconductor device is connected to the rest of the semiconductor wafer by no more than at least one connecting pillar; arranging the semiconductor wafer on a carrier wafer such that the first main face faces the carrier wafer; attaching the at least one semiconductor device to the carrier wafer; and removing the at least one semiconductor device from the semiconductor wafer by breaking the at least one connecting pillar.

A slicing wafer includes a driver circuit substrate; a plurality of epitaxial layer slices arranged side-by-side on the driver circuit substrate; and a bonding layer, formed between the driver circuit substrate and the plurality of epitaxial layer slices.