H01L21/7806

Stress-induced selective-area lift-off of thin films and devices on van der Waals buffer layers

A method for making a selective-area lift-off thin film comprises depositing a van der Waals (vdW) buffer on a substrate; depositing a thin film material (or device structure) on the van der Waals buffer; depositing an adhesion layer on the thin film material; forming a stressor layer on top of the thin film layer; and bonding a handle layer to the stressor layer. Force may be applied to the layered structure by one or more of rolling, bending, and shearing. The area selected for lift-off may be defined by one of laser cutting and mechanical scribing. The vdW buffer includes one or more of hBN, graphite, and graphene. The handle layer is a one of a polyimide tape, thermal release tape, UV release tape, water- or solvent-soluble tape, Kapton tape, and Scotch tape. The stressor layer is a metal film, e.g. Ni, Cr, Ti.

METHOD FOR REMOVING A BAR OF ONE OR MORE DEVICES USING SUPPORTING PLATES

A method for removing devices from a substrate using a supporting plate. One or more bars comprised of semiconductor layers are formed on a substrate, and one or more device structures are formed on the bars. At least one supporting plate is bonded to the bars, and stress is applied to the supporting plate to remove the bars from the substrate. The supporting plate is used to divide the bars into one or more device units after the bars are removed from the substrate, wherein the device units are packaged and arranged into one or more modules. The supporting plate may also be used to make a cleavage facet for one or more of the device structures after the bars are removed from the substrate.

PROCESSING APPARATUS AND PROCESSING METHOD
20220181157 · 2022-06-09 ·

A processing apparatus configured to process a processing target object includes a modifying device configured to radiate laser light to an inside of the processing target object to form multiple modification layers along a plane direction; and a controller configured to control an operation of the modifying device at least. The controller controls the modifying device to form, in the forming of the modification layers, a first modification layer formation region in which cracks that develop from neighboring modification layers along the plane direction are not connected, and also controls the modifying device to form, in the forming of the modification layers, a second modification layer formation region in which cracks that develop from neighboring modification layers along the plane direction are connected.

FIELD EFFECT TRANSISTOR AND METHOD FOR MAKING THE SAME

A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The substrate includes a plurality of protrusions spaced apart from each other, and one of the plurality of graphene nanoribbons is on the substrate and between two adjacent protrusions. An interdigital electrode is placed on the graphene nanoribbon composite structure, and the interdigital electrode covers the plurality of protrusions and is electrically connected to the plurality of graphene nanoribbons.

FIELD EFFECT TRANSISTOR AND METHOD FOR MAKING THE SAME

A method for making a field effect transistor includes providing a graphene nanoribbon composite structure. The graphene nanoribbon composite structure includes a substrate and a plurality of graphene nanoribbons spaced apart from each other. The plurality of graphene nanoribbons are located on the substrate and extend substantially along a same direction, and each of the plurality of graphene nanoribbons includes a first end and a second end opposite to the first end. A source electrode is formed on the first end, and a drain electrode is formed on the second end. The source electrode and the drain electrode are electrically connected to the plurality of graphene nanoribbons. An insulating layer is formed on the plurality of graphene nanoribbons, and the plurality of graphene nanoribbons are between the insulating layer and the substrate. A gate is formed on a surface of the insulating layer away from the substrate.

Aluminum nitride substrate removal for ultraviolet light-emitting devices

In various embodiments, extraction efficiency of light-emitting devices fabricated on aluminum nitride substrates is enhanced via removal of at least a portion of the substrate.

Atomic precision control of wafer-scale two-dimensional materials

Embodiments of this disclosure include apparatus, systems, and methods for fabricating monolayers. In one example, a method includes forming a multilayer film having a plurality of monolayers of a two-dimensional (2D) material on a growth substrate. The multilayer film has a first side proximate the growth substrate and a second side opposite the first side.

METHOD FOR PRODUCING ELECTRONIC DEVICE

The present invention is a method for producing an electronic device having a drive circuit including a solar cell structure, the method including the steps of: obtaining a bonded wafer by bonding a first wafer having a plurality of independent solar cell structures including a compound semiconductor, the solar cell structures being formed on a starting substrate by epitaxial growth, and a second wafer having a plurality of independent drive circuits formed, so that the plurality of solar cell structures and the plurality of drive circuits are respectively superimposed; wiring the bonded wafer so that electric power can be supplied from the plurality of solar cell structures to the plurality of drive circuits respectively; and producing an electronic device having the drive circuit including the solar cell structure by dicing the bonded wafer. This provides a method for producing an electronic device including a drive circuit and a solar cell structure in one chip and having a suppressed production cost.

SUBSTRATE FOR REMOVAL OF DEVICES USING VOID PORTIONS

Epitaxial lateral overgrowth (ELO) III-nitride layers are grown on or above an opening area of a growth restrict mask deposited on a substrate, wherein the growth of the ELO III-nitride layers and/or a subsequent regrowth layer form one or more voids. III-nitride device layers are grown on or above the ELO III-nitride layers and/or regrowth layer. Stress is applied to a breaking point at the substrate, with the voids assisting the application of stress, so that a bar of devices comprised of the III-nitride device layers, the ELO III-nitride layers and the regrowth layer is removed from the substrate. The voids release stress from the growth restrict mask, which helps prevent cracks. Decomposition of the growth restrict mask is avoided to prevent compensation of p-type layers.

PROCESS FOR FABRICATING A COMPONENT COMPRISING A LAYER MADE OF SINGLE-CRYSTAL MATERIAL COMPATIBLE WITH HIGH THERMAL BUDGETS
20220166398 · 2022-05-26 ·

A process for fabricating a component includes an operation of transferring at least one layer of one or more piezoelectric or pyroelectric or ferroelectric materials forming part of a donor substrate to a final substrate, the process comprising a prior step of joining the layer to a temporary substrate via production of a fragile separating region between the donor substrate of single-crystal piezoelectric or pyroelectric or ferroelectric material and the temporary substrate, the region comprising at least two layers of different materials in order to ensure two compounds apt to generate an interdiffusion of one or more constituent elements of at least one of the two compounds make contact, the fragile region allowing the temporary substrate to be separated.