H01L23/047

HERMETIC PACKAGE WITH IMPROVED RF STABILITY AND PERFORMANCE
20170278767 · 2017-09-28 ·

The present disclosure relates to a hermetic package with improved RF stability and performance. The package includes a carrier, a bottom dielectric ring over the carrier, a bottom metal layer over the bottom dielectric ring, a top dielectric ring over the bottom metal layer, a top metal layer over the top dielectric ring, an exterior plated layer, and multiple top vias. Herein, the bottom metal layer includes signal sections and at least one ground section, which is electrically isolated from the signal sections. The exterior plated layer covers at least a portion of a first exterior sidewall of the bottom ring structure and electrically couples the carrier to the at least one ground section. The multiple top vias extend through the top dielectric ring and electrically couple the top metal layer to the at least one ground section.

SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF MANUFACTURE THEREOF
20170278763 · 2017-09-28 ·

A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.

SEMICONDUCTOR DEVICE PACKAGE AND METHODS OF MANUFACTURE THEREOF
20170278763 · 2017-09-28 ·

A method of manufacturing a packaged semiconductor device includes forming an assembly by placing a semiconductor die over a substrate with a die attach material between the semiconductor die and the substrate. A conformal structure which includes a pressure transmissive material contacts at least a portion of a top surface of the semiconductor die. A pressure is applied to the conformal structure and in turn, the pressure is transmitted to the top surface of the semiconductor die by the pressure transmissive material. While the pressure is applied, concurrently encapsulating the assembly with a molding compound and exposing the assembly to a temperature that is sufficient to cause the die attach material to sinter.

Package and method for fabricating package

A package that hermetically seals an integrated circuit includes a metal lid (7) and a metal housing (10) having an open upper portion (12). In the package, the housing (10) includes in a wall surface thereof a glass unit (2) that seals a plurality of lead terminals therein. The glass unit (2) is disposed in a wall surface of the housing (10) such that a thickness in a vertical direction of the wall surface on an upper side of the glass unit (2) is determined according to a threshold limit value of a difference in temperature between glass that forms the glass unit (2) and metal that forms the wall surface.

Package and method for fabricating package

A package that hermetically seals an integrated circuit includes a metal lid (7) and a metal housing (10) having an open upper portion (12). In the package, the housing (10) includes in a wall surface thereof a glass unit (2) that seals a plurality of lead terminals therein. The glass unit (2) is disposed in a wall surface of the housing (10) such that a thickness in a vertical direction of the wall surface on an upper side of the glass unit (2) is determined according to a threshold limit value of a difference in temperature between glass that forms the glass unit (2) and metal that forms the wall surface.

Semiconductor device
09818705 · 2017-11-14 · ·

A semiconductor device includes at least one semiconductor element having a first terminal side and a second terminal side connected by an outer periphery portion, a first terminal on the first terminal side, and a second terminal on the second terminal side. The device includes a frame surrounding the outer periphery portion of the semiconductor element. A first electrode is on the first terminal side and is electrically connected to the first terminal. The first electrode includes a first body portion and a first projection protruding outwardly therefrom around the circumference of the first body portion. A second electrode is on the second terminal side and is electrically connected to the second terminal, and a metal plate is over the first electrode. The first projection of the first electrode is spaced from and extends along a peripheral portion of the metal plate.

Semiconductor device
09818705 · 2017-11-14 · ·

A semiconductor device includes at least one semiconductor element having a first terminal side and a second terminal side connected by an outer periphery portion, a first terminal on the first terminal side, and a second terminal on the second terminal side. The device includes a frame surrounding the outer periphery portion of the semiconductor element. A first electrode is on the first terminal side and is electrically connected to the first terminal. The first electrode includes a first body portion and a first projection protruding outwardly therefrom around the circumference of the first body portion. A second electrode is on the second terminal side and is electrically connected to the second terminal, and a metal plate is over the first electrode. The first projection of the first electrode is spaced from and extends along a peripheral portion of the metal plate.

AIR CAVITY PACKAGE

An air cavity package includes a dielectric frame that is formed from an alumina ceramic, a polyimide, or a semi-crystalline thermoplastic. The dielectric frame is joined to a flange using a high temperature silicone adhesive. Leads may be bonded to the dielectric frame using a high temperature organic adhesive, a direct bond, or by brazing.

SEMICONDUCTOR PACKAGE COMPONENT, BASE SUBSTRATE FOR RF TRANSISTOR, AND MANUFACTURING METHOD THEREOF
20220045023 · 2022-02-10 ·

A semiconductor package component and a semiconductor package including the same. More particularly, the present disclosure relates to a semiconductor package component for an RF power transistor and a semiconductor package including the same. Further particularly, it relates to a semiconductor package component for an RF power transistor and a semiconductor package including the same, capable of adjusting impedance matching of an RF transistor by connecting a die chip and a lead frame with a wire so that a length of the wire is reduced as much as the protruding height of the base substrate.

AMPLIFICATION DEVICE AND MATCHING CIRCUIT BOARD

An amplification device includes a base substrate, an amplification element, and a matching circuit board. The amplification element is mounted on the base substrate. The matching circuit board is mounted on the base substrate and includes a circuit pattern which is electrically connected to the amplification element. The matching circuit board includes a first side surface and a second side surface each extending in the longitudinal direction of the matching circuit board. A first recess is provided in the first side surface. A second recess facing the first recess is provided in the second side surface.