A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A first metal frame is disposed over the substrate around the first semiconductor die. A first metal lid is disposed over the first metal frame. A flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame. An edge of the flap can have a castellated edge. A recess in the first metal frame and a protrusion on the first metal lid can be used to latch the first metal lid onto the first metal frame. A second metal frame and second metal lid can be disposed over an opposite surface of the substrate from the first metal frame.

A semiconductor device has a substrate and a first semiconductor die disposed over the substrate. A first metal frame is disposed over the substrate around the first semiconductor die. A first metal lid is disposed over the first metal frame. A flap of the first metal lid includes an elastic characteristic to latch onto the first metal frame. An edge of the flap can have a castellated edge. A recess in the first metal frame and a protrusion on the first metal lid can be used to latch the first metal lid onto the first metal frame. A second metal frame and second metal lid can be disposed over an opposite surface of the substrate from the first metal frame.

The object is to provide a technology for enabling enhancement of the reliability of a semiconductor device. The semiconductor device includes: a semiconductor element; a piece of linear wire connected to an upper surface of the semiconductor element; a coating material in contact with the semiconductor element, and the piece of wire in an upper region on the semiconductor element; and a sealant protecting the semiconductor element, the piece of wire, and the coating material, wherein the coating material contains substances with covalent bonds between oxygen and each of silicon and a metal, a silicon oxide, and siloxane.

The object is to provide a technology for enabling enhancement of the reliability of a semiconductor device. The semiconductor device includes: a semiconductor element; a piece of linear wire connected to an upper surface of the semiconductor element; a coating material in contact with the semiconductor element, and the piece of wire in an upper region on the semiconductor element; and a sealant protecting the semiconductor element, the piece of wire, and the coating material, wherein the coating material contains substances with covalent bonds between oxygen and each of silicon and a metal, a silicon oxide, and siloxane.

A power semiconductor module arrangement includes: a base plate; substrates arranged on a first surface of the base plate; a connection layer arranged between a different one of the substrates and the base plate and permanently attaching the respective substrate to the base plate; and a spacer arranged between one of the substrates and the base plate and embedded in a material of the respective connection layer. For at least one substrate: either no spacer or one or more of a first kind of spacers having a first height in a vertical direction perpendicular to the first surface of the base plate is arranged below a first half of the respective substrate, and one or more of a second kind of spacers having a second height in the vertical direction is arranged below a second half of the respective substrate, the second height being greater than the first height.

A power semiconductor module arrangement includes: a base plate; substrates arranged on a first surface of the base plate; a connection layer arranged between a different one of the substrates and the base plate and permanently attaching the respective substrate to the base plate; and a spacer arranged between one of the substrates and the base plate and embedded in a material of the respective connection layer. For at least one substrate: either no spacer or one or more of a first kind of spacers having a first height in a vertical direction perpendicular to the first surface of the base plate is arranged below a first half of the respective substrate, and one or more of a second kind of spacers having a second height in the vertical direction is arranged below a second half of the respective substrate, the second height being greater than the first height.

A semiconductor device includes a first input conductive plate on which a plurality of first semiconductor chips arranged in a first direction, a first output conductive plate extending in the first direction and being provided adjacent to the first input conductive plate, a case having first to fourth side walls for accommodating the first input conductive plate and the first output conductive plate, first main current wiring members, each of which connects one of the first output electrodes to a front surface of the first output conductive plate, a first detection terminal disposed in the first side wall, and a first detection wiring member connecting the front surface of the first output conductive plate to the first detection terminal. The first output conductive plate is disposed closer to the first side wall than is the first input conductive plate.

A semiconductor device includes a first input conductive plate on which a plurality of first semiconductor chips arranged in a first direction, a first output conductive plate extending in the first direction and being provided adjacent to the first input conductive plate, a case having first to fourth side walls for accommodating the first input conductive plate and the first output conductive plate, first main current wiring members, each of which connects one of the first output electrodes to a front surface of the first output conductive plate, a first detection terminal disposed in the first side wall, and a first detection wiring member connecting the front surface of the first output conductive plate to the first detection terminal. The first output conductive plate is disposed closer to the first side wall than is the first input conductive plate.

Each of a plurality of terminals has a first portion and a second portion being a connection target for a semiconductor element. A manufacturing method of a housing includes a first step arranging, for a lower mold provided with a plurality of holes each of which is a target into which the first portion is inserted, a nest having a third portion covering at least one of the holes, a second step arranging, for the lower mold with the nest being arranged therein, the plurality of terminals by inserting the first portion into the hole not covered by the third portion, a third step arranging an upper mold on the lower mold with the nest and the plurality of terminals being arranged therein, and a fourth step, which is executed after the third step, obtaining the housing by performing resin molding using the lower mold and the upper mold.

Each of a plurality of terminals has a first portion and a second portion being a connection target for a semiconductor element. A manufacturing method of a housing includes a first step arranging, for a lower mold provided with a plurality of holes each of which is a target into which the first portion is inserted, a nest having a third portion covering at least one of the holes, a second step arranging, for the lower mold with the nest being arranged therein, the plurality of terminals by inserting the first portion into the hole not covered by the third portion, a third step arranging an upper mold on the lower mold with the nest and the plurality of terminals being arranged therein, and a fourth step, which is executed after the third step, obtaining the housing by performing resin molding using the lower mold and the upper mold.