In a semiconductor device, a first protection film covers an end portion of a first metal layer disposed on a semiconductor substrate, and has a first opening above the first metal layer. A second metal layer is disposed on the first metal layer in the first opening. An oxidation inhibition layer is disposed on the second metal layer in the first opening. A second protection film has a second opening and covers an end portion of the oxidation inhibition layer and the first protection film. The second protection film has an opening peripheral portion on a periphery of the second opening, and covers the end portion of the oxidation inhibition layer. An adhesion portion adheres to a portion of a lower surface of the opening peripheral portion. The adhesion portion has a higher adhesive strength with the second protection film than the oxidation inhibition layer.

A semiconductor device includes: a semiconductor element that converts DC electric power into AC electric power; a DC terminal that transmits DC electric power; an AC terminal that transmits AC electric power; a sealing member that seals the semiconductor element, at least a part of the DC terminal, and at least a part of the AC terminal; and at least one floating terminal that is arranged between the DC terminal and the AC terminal.

Embodiments of a silicon heat-dissipation package for compact electronic devices are described. In one aspect, a device includes first and second silicon cover plates. The first silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The second silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The first primary side of the second silicon cover plate includes an indentation configured to accommodate an electronic device therein. The first primary side of the second silicon cover plate is configured to mate with the second primary side of the first silicon cover plate when the first silicon cover plate and the second silicon cover plate are joined together with the electronic device sandwiched therebetween.

Embodiments of a silicon heat-dissipation package for compact electronic devices are described. In one aspect, a device includes first and second silicon cover plates. The first silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The second silicon cover plate has a first primary side and a second primary side opposite the first primary side thereof. The first primary side of the second silicon cover plate includes an indentation configured to accommodate an electronic device therein. The first primary side of the second silicon cover plate is configured to mate with the second primary side of the first silicon cover plate when the first silicon cover plate and the second silicon cover plate are joined together with the electronic device sandwiched therebetween.

An object of the present invention is to suppress electrical contact between an outer peripheral portion of an intermediate electrode and a front surface electrode of a semiconductor chip without increasing the area of the semiconductor chip. A facing surface of the first intermediate electrode facing a first main electrode is smaller than a facing surface of the first main electrode facing the first intermediate electrode, and has an outer peripheral protective region and a connection region surrounded by the protective region. A pressure-contact semiconductor device includes a plurality of first conductor films partially formed in the connection region, and a first insulating film formed in regions in the connection region where no first conductor films are formed and in the protective region.

There is provided a semiconductor device 1, comprising: a housing comprising a housing electrode 4; and at least one semiconductor chip 20 arranged within the housing; wherein the housing electrode 4 comprises a deformable portion 15, and the deformable portion 15 is configured to deform when a pressure difference between an interior and an exterior of the housing exceeds a threshold differential pressure or a temperature at the deformable portion exceeds a threshold temperature, so as to transform the housing from a hermetically sealed housing to an open housing in fluid communication with the exterior.

There is provided a semiconductor device 1, comprising: a housing comprising a housing electrode 4; and at least one semiconductor chip 20 arranged within the housing; wherein the housing electrode 4 comprises a deformable portion 15, and the deformable portion 15 is configured to deform when a pressure difference between an interior and an exterior of the housing exceeds a threshold differential pressure or a temperature at the deformable portion exceeds a threshold temperature, so as to transform the housing from a hermetically sealed housing to an open housing in fluid communication with the exterior.

Described herein are wafer accommodation containers. A wafer accommodation container (1) includes: a container body having one end that is provided with an opening (11) and another end that is provided with a mount element (12) on which wafers are stacked, the mount element (12) facing the opening (11); a cover (20) to cover the opening (11); and a connection mechanism (30) to detachably connect the container body (10) and the cover (20).

Described herein are wafer accommodation containers. A wafer accommodation container (1) includes: a container body having one end that is provided with an opening (11) and another end that is provided with a mount element (12) on which wafers are stacked, the mount element (12) facing the opening (11); a cover (20) to cover the opening (11); and a connection mechanism (30) to detachably connect the container body (10) and the cover (20).

There is provided a semiconductor device 1, comprising: a housing comprising a first housing electrode 4 and a second housing electrode 5 arranged at opposite sides of the housing; and a plurality of semiconductor units 30 arranged within the housing between the first and second housing electrodes 4, 5 and coupled to at least one of the first and second housing electrodes 4, 5 by pressure, wherein the plurality of semiconductor units 30 comprise a first semiconductor unit 30-1 and a second semiconductor unit 30-2 neighbouring the first semiconductor unit 30-1; wherein the first and/or second housing electrode comprises a plurality of pillars 10, and the plurality of pillars comprise a first pillar 10-1 and a second pillar 10-2 electrically coupled to the first and second semiconductor units 30-1, 30-2, respectively, and wherein a surface 16 of the first housing electrode 4 comprises a groove 15, and a width W1 of the groove 15 is less than a spacing S2 between the first pillar 10-1 and the second pillar 10-2.