In a semiconductor device, a semiconductor element includes a semiconductor substrate, a surface electrode and a protective film. The semiconductor substrate has an active region and an outer peripheral region. The surface electrode includes a base electrode disposed on a front surface of the semiconductor substrate and a connection electrode disposed on the base electrode. The protective film covers a peripheral end portion of the base electrode and an outer peripheral edge of the connection electrode. The protective film has an opening to expose the connection electrode so as to enable a solder connection. A boundary between the outer peripheral edge of the connection electrode and the protective film is located at a position corresponding to the outer peripheral region in a plan view.

An electronic device includes an upper package, a lower package and a printed circuit board. The upper package includes an upper chip. The lower package includes a lower chip. The upper package and the lower package are stacked on the printed circuit board. The thermal diffusion layer is disposed in a vicinity of the lower chip at the lower package.

In a general aspect, an apparatus can include a leadframe. The apparatus can also include a first semiconductor die coupled with a first side of a first portion of the leadframe, and a second semiconductor die coupled with a second side of the first portion of the leadframe. The apparatus can also include a first substrate coupled with a second side of the first semiconductor die. The first substrate can be further coupled with a first side of a second portion of the leadframe and a first side of a third portion of the leadframe. The apparatus can also further include a second substrate coupled with a second side of the second semiconductor die. The second substrate can be further coupled with a second side of the second portion of the leadframe and a second side of the third portion of the leadframe.

A method includes disposing a semiconductor die between a first high voltage isolation carrier and a second high voltage isolation carrier, disposing a first molding material in a space between the semiconductor die and the first high voltage isolation carrier, and disposing a conductive spacer between the semiconductor die and the second high voltage isolation carrier. The method further includes encapsulating the first molding material and the conductive spacer with a second molding material.

The present invention has an object to enhance manufacturability of a pressure-contact-type semiconductor device. A pressure-contact-type semiconductor device according to the present invention includes: a semiconductor chip, the semiconductor chip including a guard ring and a gate signal input/output part in the first main surface; a first external electrode being formed on a side of the first main surface of the semiconductor chip; a conductive pattern being formed on the first external electrode; a contact pin connecting the gate signal input/output part and the conductive pattern; a plate-like electrode being provided on the second main surface of the semiconductor chip; a disc spring being provided on the plate-like electrode; and a second external electrode being provided on the disc spring, the second external electrode and the first external electrode interposing the semiconductor chip.

In a semiconductor device, a first metal plate faces a first semiconductor element and a second semiconductor element and is electrically connected to a second terminal. A second metal plate faces the first metal plate while interposing the first semiconductor element between the first and second metal plates, and is electrically connected to a first terminal. A third metal plate faces the first metal plate while interposing the second semiconductor element between the first and third metal plates. The first semiconductor element has an electrode on a surface adjacent to the second metal plate and electrically connected to the second metal plate, and an electrode on a surface adjacent to the first metal plate and electrically connected to the third metal plate. The first semiconductor element is thermally connected to the first metal plate while being electrically insulated from the first metal plate by an insulator.

A power module (1) is disclosed, comprising: first and second substrates (10), each substrate patterned layer of electrically conductive material (12), a plurality of pre-packed power cells (20), positioned between the substrates, each cell comprising: an electrically insulating core (21) embedding at least one power die (22), and two external layers (23) of electrically conductive material on opposite sides of the electrically insulating core (21), said external layers being respectively connected to each patterned layers of the substrates,
wherein each external layer of a pre-packed power cell comprises a contact pad (230) connected to a respective contact (220) of the power die through connections arranged in the electrically insulating core (21), said contact pad having a surface area greater than the surface area of the power die electrical contact to which it is connected.

A semiconductor module includes a semiconductor chip having a first surface provided with a first electrode pad and a second surface, opposite to the first surface, provided with a second electrode pad, a first substrate connected to the first electrode pad, a second substrate provided on the side of the second surface, and a conductor section, electrically connecting the second electrode pad and the second substrate, and having a size greater than the second electrode pad in a plan view viewed from the side of the second substrate.

A circuit package is provided, the circuit package including: an electronic circuit; a metal block next to the electronic circuit; encapsulation material between the electronic circuit and the metal block; a first metal layer structure electrically contacted to at least one first contact on a first side of the electronic circuit; a second metal layer structure electrically contacted to at least one second contact on a second side of the electronic circuit, wherein the second side is opposite to the first side; wherein the metal block is electrically contacted to the first metal layer structure and to the second metal layer structure by means of an electrically conductive medium; and wherein the electrically conductive medium includes a material different from the material of the first and second metal layer structures or has a material structure different from the material of the first and second metal layer structures.

A circuit package is provided, the circuit package including: an electronic circuit; a metal block next to the electronic circuit; encapsulation material between the electronic circuit and the metal block; a first metal layer structure electrically contacted to at least one first contact on a first side of the electronic circuit; a second metal layer structure electrically contacted to at least one second contact on a second side of the electronic circuit, wherein the second side is opposite to the first side; wherein the metal block is electrically contacted to the first metal layer structure and to the second metal layer structure by means of an electrically conductive medium; and wherein the electrically conductive medium includes a material different from the material of the first and second metal layer structures or has a material structure different from the material of the first and second metal layer structures.