H01L23/051

SEMICONDUCTOR DEVICE WITH STACKED TERMINALS
20230171909 · 2023-06-01 ·

A semiconductor device includes: a housing; a substrate inside the housing; first and second semiconductor circuits on the substrate; and first and second planar terminals electrically connected to the first and second semiconductor circuits, respectively, the first and second planar terminals stacked on top of each other, wherein each of the first and second planar terminals extends away from the housing.

SEMICONDUCTOR DEVICE

In a semiconductor device, a first skirt portion molded from a first mold resin and a second skirt portion molded from a second mold resin are provided on a heat dissipating surface of a lead frame. Also, a thinly-molded portion is molded integrally with the second skirt portion from the second mold resin. According to this kind of configuration, adhesion between the thinly-molded portion and lead frame is high, and the semiconductor device with excellent heat dissipation and insulation is obtained.

SEMICONDUCTOR DEVICE

In a semiconductor device, a first skirt portion molded from a first mold resin and a second skirt portion molded from a second mold resin are provided on a heat dissipating surface of a lead frame. Also, a thinly-molded portion is molded integrally with the second skirt portion from the second mold resin. According to this kind of configuration, adhesion between the thinly-molded portion and lead frame is high, and the semiconductor device with excellent heat dissipation and insulation is obtained.

SEMICONDUCTOR DEVICE AND POWER MODULE
20170317006 · 2017-11-02 ·

A semiconductor device of a double-side cooling structure having a bus bar electrically connected, and coolers independently arranged on both sides of the semiconductor device for cooling is provided. The semiconductor device includes: a semiconductor chip including an element, and has a first main surface and a second main surface; a sealing resin body having a first surface and a second surface and also having a side surface; a first heatsink arranged facing the first main surface and electrically connected to the first main electrode; and a second heatsink arranged facing the second main surface and electrically connected to the second main electrode. The first heatsink is exposed only to the first surface. The second heatsink is exposed only to the second surface. An exposed surface of a heatsink to be electrically connected to the bus bar has a heat dissipation region, and an electrical connection region.

Laminate package of chip on carrier and in cavity
20170316994 · 2017-11-02 ·

A package which comprises a chip carrier made of a first material, a body made of a second material differing from the first material and being arranged on the chip carrier so as to form a cavity, a semiconductor chip arranged at least partially in the cavity, and a laminate encapsulating at least one of at least part of the chip carrier, at least part of the body and at least part of the semiconductor chip.

Laminate package of chip on carrier and in cavity
20170316994 · 2017-11-02 ·

A package which comprises a chip carrier made of a first material, a body made of a second material differing from the first material and being arranged on the chip carrier so as to form a cavity, a semiconductor chip arranged at least partially in the cavity, and a laminate encapsulating at least one of at least part of the chip carrier, at least part of the body and at least part of the semiconductor chip.

Transistor arrangement with semiconductor chips between two substrates

An electronic device comprising a first substrate, a second substrate, a first semiconductor chip comprising a transistor, comprising a first mounting surface bonded to the first substrate and comprising a second mounting surface bonded to the second substrate, and a second semiconductor chip comprising a first mounting surface bonded to the first substrate and comprising a second mounting surface bonded to the second substrate, wherein the first semiconductor chip comprises a via electrically coupling a first transistor terminal at its first mounting surface with a second transistor terminal at its second mounting surface.

Press-pack semiconductor fixtures

A press-pack semiconductor fixture 200 includes a housing defining an interior passage. A first conductor and a second conductor are mechanically coupled with the housing. The mechanical coupling of the first conductor and the second conductor with the housing is effective to apply a clamping force to a press pack semiconductor. A number of apertures or openings are provided in the housing, the first conductor, and the second conductor to permit fluidic flow 290 between the interior passage 239 and spaces or structures exterior to the housing.

Press-pack semiconductor fixtures

A press-pack semiconductor fixture 200 includes a housing defining an interior passage. A first conductor and a second conductor are mechanically coupled with the housing. The mechanical coupling of the first conductor and the second conductor with the housing is effective to apply a clamping force to a press pack semiconductor. A number of apertures or openings are provided in the housing, the first conductor, and the second conductor to permit fluidic flow 290 between the interior passage 239 and spaces or structures exterior to the housing.

SEMICONDUCTOR MODULE
20220059474 · 2022-02-24 ·

A semiconductor module includes: a semiconductor element; and a sealing member. The semiconductor element includes: a semiconductor substrate; a protection film on the semiconductor substrate; a metal film on the semiconductor substrate and having at least a part located between the semiconductor substrate and the protection film; and a dummy metal film on the semiconductor substrate between the metal film and the protection film. The surface of the semiconductor substrate has a recess. The protection film has an other recess or a hole. The dummy metal film is arranged in both the recess of the semiconductor substrate and the other recess or the hole of the protection film.