An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

A semiconductor device package includes a substrate having a surface, a conductive element disposed on the surface of the substrate, and an encapsulant disposed on the surface of the substrate and covering the conductive element. The conductive element has an upper surface facing away from the substrate and exposed from the encapsulant. Further, a roughness of the upper surface of the conductive element is greater than a roughness of a side surface of the conductive element.

An element package includes a semiconductor element, a redistribution layer, a sealing resin body, and an insulating portion. The semiconductor element includes a semiconductor substrate having an element region and a scribe region, a main electrode and a pad disposed on a surface of the semiconductor substrate, and a protective film disposed above the element region on the surface of the semiconductor substrate. The sealing resin body seals the semiconductor element while exposing the main electrode and the pad. The insulating portion is disposed above the scribe region on the surface of the semiconductor element with a height not to exceed an outer peripheral edge portion of an upper surface of the protective film on the element region. The redistribution layer extends over the protective film and the insulating portion above the scribe region.

A semiconductor device comprises a lead, a board, and an electrically conductive layer on the board. The lead comprises a longitudinal axis and is soldered to the electrically conductive layer. The semiconductor device further comprises a first solder dam edge and a second solder dam edge, each positioned on the lead not more than 10 mils apart from each other along the longitudinal axis.

A leadframe has a die pad area and an outer layer of a first metal having a first oxidation potential. The leadframe is placed in contact with a solution containing a second metal having a second oxidation potential, the second oxidation potential being more negative than the first oxidation potential. Radiation energy is then applied to the die pad area of the leadframe contacted with the solution to cause a local increase in temperature of the leadframe. As a result of the temperature increase, a layer of said second metal is selectively provided at the die pad area of the leadframe by a galvanic displacement reaction. An oxidation of the outer layer of the leadframe is then performed to provide an enhancing layer which counters device package delamination.

The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.

According to the present invention, a power module that has a base to which a power semiconductor device is bonded and a sealing body for sealing said base and in which the base and the sealing body are bonded with a primer layer interposed therebetween, said primer layer being formed of a cured product of a silicone-modified polyimide resin composition containing, for example, components (A) to (E) below, has high reliability because delamination of an epoxy sealing resin under high temperature conditions is suppressed. (A) Silicone-modified polyimide resin represented by formula (1)
Ee-Ff-Gg  (1)
E is represented by formula (2), F is represented by formula (3), G is a divalent group derived from diamine, f+e+g=100 mol %, the molar ratio f/(e+g) is 0.9-1.1, and e is 1-90 when the sum of e and g is 100. ##STR00001##
R.sup.A is a divalent hydrocarbon group, R.sup.1 and R.sup.2 are alkyl groups, R.sup.3 and R.sup.4 are monovalent aliphatic hydrocarbon groups, R.sup.5 and R.sup.6 are aryl groups or the like, m is an integer of 0-20, n is an integer of 1-20, o is an integer of 0-20, and m+n+o is an integer of 1-30.
-Im-X-Im-  (3)
Im is a cyclic group including a cyclic imide structure, and X is a single bond or the like. (Bc) Heat-decomposable radical initiator (C) Solvent (D) Antioxidant (E) Fumed silica.

There are provided a semiconductor module capable of preventing the peeling of a sealing resin on the side where a connection section used for the connection to a semiconductor element is arranged and a manufacturing method for a semiconductor module. A semiconductor module includes: an outer frame; sealing resins; gate signal output terminals, and partition sections laid across the outer flame to partition a space into a plurality of housing sections, in the partition sections which the gate signal output terminals with connection sections exposed are arranged. The partition sections have through holes where sealing resins are formed, the sealing resins connecting adjacent housing sections and the sealing resin formed in the through hole being continuous with the sealing resins formed in the housing sections.

A semiconductor device includes a semiconductor element, a lead frame, a conductive member, a resin composition and a sealing resin. The semiconductor element has an element front surface and an element back surface facing away in a first direction. The semiconductor element is mounted on the lead frame. The conductive member is bonded to the lead frame, electrically connecting the semiconductor element and the lead frame. The resin composition covers a bonded region where the conductive member and lead frame are bonded while exposing part of the element front surface. The sealing resin covers part of the lead frame, the semiconductor element, and the resin composition. The resin composition has a greater bonding strength with the lead frame than a bonding strength between the sealing resin and lead frame and a greater bonding strength with the conductive member than a bonding strength between the sealing resin and conductive member.

A lead-frame assembly is disclosed, for a semiconductor die and comprising a die attach pad and a plurality of elongate leads spaced apart therefrom; wherein each elongate lead has a first proximal end portion, a second distal end portion and a middle portion therebetween; wherein the die attach pad and each of the plurality of elongate leads each comprise a coating-free portion, and a coated portion having a coating material thereon; wherein a part of a perimeter of the die attach pad proximal each lead is comprised in the coating-free portion, and wherein the proximal end portion of each elongate lead is comprised in the coating-free portion. Associated package assemblies and methods are also disclosed.