A device package and methods of forming are provided. The device package includes a logic die and a first passivation layer over the logic die. The device package also includes a memory die and a molding compound extending along sidewalls of the logic die and the memory die. The device package also includes a conductive via extending through the molding compound, and a first redistribution layer (RDL) structure over the molding compound. The molding compound extends between a top surface of the memory die and a bottom surface of the first RDL structure. A top surface of the first passivation layer contacts the bottom surface of the first RDL structure.

A semiconductor device includes: a semiconductor element disposed on a semiconductor substrate; a first insulating film disposed on the semiconductor substrate, the first insulating film having an upper surface and an edge; a resin layer disposed on the semiconductor substrate, the resin layer covering the semiconductor element; and a second insulating film disposed on the semiconductor substrate, the second insulating film covering the upper and side surfaces of the resin layer, wherein the second insulating film has an edge arranged apart from the side surface of the resin layer by a distance, and the distance between the edge of the second insulating film and the side surface of the resin layer is greater than a film thickness of the second insulating film.

A mechanism of a semiconductor structure with composite barrier layer under redistribution layer is provided. A semiconductor structure includes a substrate comprising a top metal layer on the substrate; a passivation layer over the top metal layer having an opening therein exposing the top metal layer; a composite barrier layer over the passivation layer and the opening, the composite barrier layer includes a center layer, a bottom layer, and an upper layer, wherein the bottom layer and the upper layer sandwich the center layer; and a redistribution layer (RDL) over the composite barrier layer and electrically connecting the underlying top metal layer.

Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a method includes depositing a first dielectric layer over a metal pad disposed over a workpiece, forming a first opening in the first dielectric layer to expose a portion of the metal pad, after the forming of the first opening, forming a second dielectric layer over the exposed portion of the metal pad, depositing a first polymeric material over the second dielectric layer, forming a second opening through the first polymeric material and the second dielectric layer to expose the metal pad, and forming a bump feature over the exposed metal pad.

Disclose is a method for fabricating a semiconductor device. The method includes: forming a groove such as by etching one side surface of a first substrate; attaching a second substrate including a silicon layer on the etched surface of the first substrate formed with the hollow groove; etching the second substrate so as to leave substantially only the silicon layer; forming a thin film structure on the surface of silicon layers of the second substrate; and separating the second substrate formed with the thin film structure from the first substrate. For example, the groove structure may be formed in the lower portion of the device in the process of fabricating the semiconductor device to facilitate the final device separation.

Semiconductor structures and method of forming the same are provided. A semiconductor structure according to the present disclosure includes a contact feature in a dielectric layer, a passivation structure over the dielectric layer, a conductive feature over the passivation structure, a seed layer disposed between the conductive feature and the passivation structure, a protecting layer disposed along sidewalls of the conductive feature, and a passivation layer over the conductive feature and the protecting layer.

A substrate oxidation assembly includes: a chamber body defining a processing volume; a substrate support disposed in the processing volume; a plasma source coupled to the processing volume; a steam source fluidly coupled to the processing volume; and a substrate heater. A method of processing a semiconductor substrate includes: initiating conformal radical oxidation of high aspect ratio structures of the substrate comprising: heating the substrate; and exposing the substrate to steam; and conformally oxidizing the substrate. A semiconductor device includes a silicon and nitrogen containing layer; a feature formed in the silicon and nitrogen containing layer having an aspect ratio of at least 40:1; and an oxide layer on the face of the feature having a thickness in a bottom region of the silicon and nitrogen containing layer that is at least 95% of a thickness of the oxide layer in a top region.

A pad formed in a semiconductor chip is formed such that a thickness of an aluminum film in a wire bonding portion is smaller than that of an aluminum film in a peripheral portion covered with a protective film. On the other hand, a thickness of a wiring formed in the same step as the pad is larger than that of the pad in the wire bonding portion. The main conductive film of the pad in the wire bonding portion is comprised of only one layer of a first aluminum film, while the main conductive film of the wiring is comprised of at least two layers of aluminum films (the first aluminum film and a second aluminum film) in any region of the wiring.

A semiconductor device is provided, including a substrate, an interconnection structure formed on the substrate, a first top conductive layer formed on the interconnection structure, bars formed on the interconnection structure, and a second top conductive layer formed above the first top conductive layer. The first top conductive layer includes several first conducting portions spaced apart from each other, and at least one of the bars is positioned between adjacent two of the first conducting portions.

To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a semiconductor substrate having an insulating film in which an opening that exposes each of a plurality of electrode pads is formed is provided, and a flux member including conductive particles is arranged over each of the electrode pads. Thereafter, a solder ball is arranged over each of the electrode pads via the flux member, and is then heated via the flux member so that the solder ball is bonded to each of the electrode pads. The width of the opening of the insulating film is smaller than the width (diameter) of the solder ball.