Patent classifications
H01L23/3675
Ultraviolet (UV)-curable sealant in a microelectronic package
Embodiments may relate to a microelectronic package that includes an integrated heat spreader (IHS) coupled with a package substrate. The microelectronic package may further include a sealant material between the package substrate and the IHS. The sealant material may be formed of a material that cures when exposed to ultraviolet (UV) wavelengths. Other embodiments may be described or claimed.
Power conversion device
The power conversion device includes: a main circuit having first and second wiring layers formed respectively on both surfaces of a base board, mounted parts mounted on the first and second wiring layers, and first and second GND layers formed respectively, between external- and internal-layer portions of the base board and in regions corresponding to the mounted parts each being a mounted part which forms a circuit other than a circuit having an inductance component as a lumped constant, and to the first and second wiring layers; and a cooler attached to the base board by means of fixing screws through a first through-hole created in an end portion of the board; wherein the first and second GND layers are each formed so that creepage distance is created around a second through-hole in which a lead insertion part that mutually connects the first and second wiring layers is inserted.
Thermal management of three-dimensional integrated circuits
A 3D integrated circuit device can include a substrate, a thermal interface layer and at least one die, at least one device layer bonded between the thermal interface layer and the at least one die, wherein the thermal interface layer enhances conductive heat transfer between the at least one device layer and the at least one die, and a heat sink located adjacent to a heat spreader, wherein the thermal interface layer, the at least one die and the at least one device layer are located between the heat spreader and the substrate.
Electronics assemblies and methods of manufacturing electronics assemblies with improved thermal performance
Electronics assemblies and methods of manufacturing electronics assemblies having improved thermal performance. One example of these electronics assemblies includes a printed circuit board (PCB), an integrated circuit package mounted to the PCB, the integrated circuit packing having a heat generating component, and a heat spreader soldered to the PCB such that the heat spreader is thermally coupled to the heat generating component of the integrated circuit package to dissipate heat generated by the heat generating component.
COOLING SYSTEMS FOR A CIRCUIT BOARD
A cooling system for a circuit board includes a conforming layer that conforms to the profile of the circuit board, including a base and at least one heat generating component. A cap is connected to the conforming layer and offset from the conforming layer with a gap. A working fluid is flowed through the gap and used to cool the heat generating component. This allows for a low-cost and flexible cooling system for a circuit board without a redesign of a cold plate with each change to the circuit board.
Power converter cooling in aviation
An arrangement for cooling at least one power module of a power converter is disclosed herein. The arrangement includes power semiconductor components. The power module is arranged in a drive flow of an engine in such a way that the drive flow flows around cooling ribs of the power module. The disclosure also relates to a power converter, (e.g., an inverter), including an arrangement of this kind and an aircraft, (e.g., an airplane), including a power converter of this kind.
Semiconductor device and manufacturing method thereof
A semiconductor device includes a circuit substrate, a semiconductor package, and a metallic cover. The semiconductor package is disposed on the circuit substrate. The metallic cover is disposed over the semiconductor package and over the circuit substrate. The metallic cover comprises a lid and outer flanges. The lid overlies the semiconductor package. The outer flanges are disposed at edges of the lid, are connected with the lid, extend from the lid towards the circuit substrate, and face side surfaces of the semiconductor package. The lid has a first region that is located over the semiconductor package and is thicker than a second region that is located outside a footprint of the semiconductor package.
SEMICONDUCTOR PACKAGE DEVICE AND METHOD OF MANUFACTURING THE SAME
A semiconductor package device includes a substrate, an electronic component, and a thermal conductive layer. The electronic component is disposed on the substrate and includes a first surface facing away from the substrate. The thermal conductive layer is disposed above the first surface of the electronic component. The thermal conductive layer includes a plurality of portions spaced apart from each other.
RF device without silicon handle substrate for enhanced thermal and electrical performance and methods of forming the same
The present disclosure relates to a radio frequency (RF) device that includes a mold device die and a multilayer redistribution structure underneath the mold device die. The mold device die includes a device region with a back-end-of-line (BEOL) portion and a front-end-of-line (FEOL) portion over the BEOL portion, and a first mold compound. The FEOL portion includes an active layer, a contact layer, and isolation sections. Herein, the active layer and the isolation sections reside over the contact layer, and the active layer is surrounded by the isolation sections. The first mold compound resides over the active layer without silicon crystal, which has no germanium content, in between. The multilayer redistribution structure includes redistribution interconnections and a number of bump structures that are at bottom of the multilayer redistribution structure and electrically coupled to the mold device die via the redistribution interconnections.
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
A semiconductor package includes a redistribution structure, a plurality of semiconductor devices, and a plurality of heat dissipation films. The plurality of semiconductor devices mounted on the redistribution structure. The plurality of heat dissipation films are respectively disposed on and jointly covering upper surfaces of the plurality of semiconductor devices. A plurality of trenches are respectively extended between each two of the plurality of heat dissipations and extended between each two of the plurality of semiconductor devices.