A semiconductor structure includes a glass substrate and a device structure. The glass substrate includes a glass layer, a heat dissipation layer and a silicon nitride layer stacked from bottom to top. The device structure includes at least one semiconductor device integrated in a device layer situated over the silicon nitride layer of the glass substrate. Or, the glass substrate includes a glass layer and a silicon nitride layer stacked from bottom to top. The device structure includes at least one semiconductor device integrated in a device layer, and a heat dissipation layer is stacked on the device layer, wherein the heat dissipation layer is bonded with the silicon nitride layer of the glass substrate. The present invention also provides a method of wafer bonding for manufacturing said semiconductor structure.

Disclosed are novel diamond-based devices, methods, and materials for use in thermal interface cooling, including a freestanding diamond wafer heat spreader, liquefied diamond thermal interface materials coolant and encapsulated nanocrystalline diamond metal heat spreaders.

A semiconductor device includes a substrate, and an epitaxial layer and an electrode that are located on the substrate. The substrate has a diamond structure that longitudinally penetrates the substrate. The diamond structure may be longitudinally divided into a first diamond part and a second diamond part below the first diamond part. The first diamond part and the second diamond part have different lateral dimensions.

It is an object of the present invention to provide a semiconductor device having high heat dissipation performance. A semiconductor device includes: a diamond substrate having a recess in an upper surface thereof; a nitride semiconductor layer disposed within the recess in the upper surface of the diamond substrate; and an electrode disposed on the nitride semiconductor layer, wherein the nitride semiconductor layer and the electrode constitute a field-effect transistor, the diamond substrate has a source via hole extending through a thickness of the diamond substrate to expose the source electrode, and the semiconductor device further includes a via metal covering an inner wall of the source via hole and a lower surface of the diamond substrate.

A structure according to the embodiment includes a first crystal grain, a second crystal grain, and a first region. The first crystal grain includes silicon nitride. The second crystal grain includes a first element selected from a first group consisting of scandium, yttrium, lanthanum, cerium, praseodymium, neodymium, promethium, samarium, europium, gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, lutetium, aluminum, chromium, zirconium, magnesium, zinc, titanium, gallium, beryllium, calcium, strontium, barium, hafnium, vanadium, niobium, tantalum, tungsten, iron, cobalt, nickel, and copper, and oxygen. The first region includes an oxide of the first element.

An integrated circuit device may include an integrated circuit die coupled to a substrate, and a porous material on the die or a thermal interface material and extending beyond the edges of the die and over the substrate. An integrated circuit system may include a substrate with a power supply and an integrated circuit die, such that a porous material on the die extends over the substrate beyond a footprint of the die. A porous material may be formed on and beyond an edge of a received integrated circuit die coupled to a substrate or a thermal interface material on the die.

A 3D semiconductor device, the device including: a first level, where the first level includes a first layer, the first layer including first transistors, and where the first level includes a second layer, the second layer including first interconnections; a second level overlaying the first level, where the second level includes a third layer, the third layer including second transistors, and where the second level includes a fourth layer, the fourth layer including second interconnections; and a plurality of connection paths, where the plurality of connection paths provides connections from a plurality of the first transistors to a plurality of the second transistors, where the second level is bonded to the first level, where the bonded includes oxide to oxide bond regions, where the bonded includes metal to metal bond regions, and where the device includes a plurality of capacitors.

A synthetic diamond plate comprising a polygonal plate formed of synthetic diamond material, the polygonal plate of synthetic diamond material having a thickness in a range 0.4 mm to 1.5 mm, and rounded corners having a radius of curvature in a range 1 mm to 6 mm. A mounted synthetic diamond plate is also disclosed comprising a polygonal synthetic diamond plate as described and a base to which the polygonal synthetic diamond plate is bonded, wherein the base comprises a cooling channel. An array of mounted synthetic diamond plates is also described, comprising a plurality of mounted synthetic diamond plates described above, wherein the cooling channels of the mounted synthetic diamond plates are linked to form a common cooling channel across the array of mounted synthetic diamond plates.

Semiconductor device assemblies are provided with one or more layers of thermally conductive material disposed between adjacent semiconductor dies in a vertical stack. The thermally conductive material can be configured to conduct heat generated by one or more of the semiconductor dies in laterally outward towards an outer edge of the assembly. The layer of thermally conductive material can comprise one or more allotropes of carbon, such as diamond, graphene, graphite, carbon nanotubes, or a combination thereof. The layer of thermally conductive material can be provided via deposition (e.g., sputtering, PVD, CVD, or ALD), or via adhering a film comprising the layer of thermally conductive material to one or more of the semiconductor dies.

A semiconductor package comprises a package substrate comprised of at least a first layer of dielectric material including a portion of diamond dust material. The diamond dust material is comprised of diamond dust particles. The semiconductor package includes at least one electrical connection coupled through layers of the package substrate.