Disclosed are film packages and methods of fabricating package modules. The film package includes a film substrate that includes a chip region and a peripheral region facing each other in a first direction, a plurality of output pads that are arranged in the first direction on the chip region and on the peripheral region, and a semiconductor chip on the chip region and electrically connected to the output pads. The output pads on the chip region are arranged at regular first intervals along the first direction. The output pads include a plurality of first output pads that are arranged at a first pitch along the first direction on the chip region and a plurality of second output pads on the peripheral region. The second output pads are arranged at a second pitch greater than the first pitch of the first output pads.

The invention relates to a foil-based package with at least one foil substrate having an electrically conductive layer arranged thereon which is patterned to provide a first electrically conducting portion and a second electrically conducting portion, which is coplanar to the first electrically conducting portion, and a third electrically conducting portion, which is coplanar to the first electrically conducting portion, the first electrically conducting portion being arranged between the second and third electrically conducting portions. In accordance with the invention, the first electrically conducting portion is implemented to be a signal-guiding waveguide for high-frequency signals and the second electrically conducting portion, which is coplanar to the first electrically conducting portion, and the third electrically conducting portion, which is coplanar to the first electrically conducting portion, form an equipotential surface.

A twistable electronic device module including a twistable substrate, an electrode pattern layer, an insulating layer, a circuit layer, a plurality of circuit boards and a plurality of electronic devices is provided. The electrode pattern layer is disposed on the twistable substrate. The insulating layer is disposed on the electrode pattern layer. The edge of the insulating layer has an opening located at the edge of the twistable substrate and exposing a part of the electrode pattern layer. The circuit layer is disposed on the insulating layer and on the sidewall of the opening, and is connected with the electrode pattern layer. The plurality of circuit boards are disposed on the circuit layer, and each is electrically connected to the circuit layer. The plurality of electronic devices are disposed on the plurality of circuit boards, and each is electrically connected to a corresponding one of the plurality of circuit boards

A power semiconductor module includes a flexible first substrate and a flexible second substrate and a first and second power semiconductor switch arranged between the first and second substrate. The first substrate has an electrically conductive first metal layer facing towards the power semiconductor switches, an electrically conductive second metal layer and an electrically non-conductive first insulation film arranged between the first and second metal layer. The second substrate has an electrically non-conductive second insulation film and a third metal layer arranged on the second insulation film. The first and second power semiconductor switch are electrically interconnected by the first and second substrate to form a half-bridge circuit.

A display device and a chip-on-film structure thereof are provided. The chip-on-film structure includes a substrate, multiple first output pads, multiple second output pads, multiple first lead wires, and multiple second lead wires. The substrate has a surface including a bonding zone. The first and output pads are located in the bonding zone. The first lead wires and the first output pads are located on the same surface of the substrate. The first lead wires and the second lead wires are located on two opposite surfaces of the substrate. Each of the first lead wires is connected to one of the first output pads. Each of the second lead wires is connected to one of the second output pads. The second lead wires each have a portion corresponding to the bonding zone and having the terminal sections that are respectively opposite to the first and second output pads.

The present invention relates to a method for manufacturing an insulating layer for a semiconductor package which can improve reliability and have excellent heat resistance by removing pores generated in the insulating layer during manufacture of an insulating layer for a semiconductor package using magnetic characteristics, and an insulating layer for a semiconductor package obtained using the method for manufacturing the insulating layer for a semiconductor package.

A laminated film in which a heat-resistant base film and a metal foil are bonded using an adhesive is provided with a barrier layer that prevents chemicals from entering the adhesive layer, between the metal foil and the adhesive layer. The barrier layer is made of a heat-resistant resin similar to that of the base film and has a water absorption rate of 1% or less. The adhesive layer is a silicone-based resin and has a thickness of 40 μm or more after drying.

At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package comprises a substrate, an antenna, and an active component. The antenna is disposed at least partially within the substrate. The active component is disposed on the substrate and electrically connected to the antenna. A location of the antenna is configured to be adjustable with respect to a location of the active component.

The present disclosure is directed to a hybrid conductive ink including: silver nanoparticles and eutectic low melting point alloy particles, wherein a weight ratio of the eutectic low melting point alloy particles and the silver nanoparticles ranges from 1:20 to 1:5. Also provided herein are methods of forming an interconnect including a) depositing a hybrid conductive ink on a conductive element positioned on a substrate, wherein the hybrid conductive ink comprises silver nanoparticles and eutectic low melting point alloy particles, the eutectic low melting point alloy particles and the silver nanoparticles being in a weight ratio from about 1:20 to about 1:5; b) placing an electronic component onto the hybrid conductive ink; c) heating the substrate, conductive element, hybrid conductive ink and electronic component to a temperature sufficient i) to anneal the silver nanoparticles in the hybrid conductive ink and ii) to melt the low melting point eutectic alloy particles, wherein the melted low melting point eutectic alloy flows to occupy spaces between the annealed silver nanoparticles, d) allowing the melted low melting point eutectic alloy of the hybrid conductive ink to harden and fuse to the electronic component and the conductive element, thereby forming an interconnect. Electrical circuits including conductive traces and, optionally, interconnects formed with the hybrid conductive ink are also provided.

An electronic package is formed by disposing an electronic element and a lead frame having a plurality of conductive posts on a carrier structure having an antenna function, and encapsulating the electronic element and the lead frame with an encapsulant. The encapsulant is defined with a first encapsulating portion and a second encapsulating portion lower than the first encapsulating portion. The electronic element is positioned in the first encapsulating portion, and the plurality of conductive posts are positioned in the second encapsulating portion. End surfaces of the plurality of conductive posts are exposed from a surface of the second encapsulating portion so as to be electrically connected to a connector.