H01L27/14681

High-speed light sensing apparatus II

An optical apparatus includes: a substrate having a first material; an absorption region having a second material different from the first material, the absorption region configured to absorb photons and to generate photo-carriers including electrons and holes in response to the absorbed photons; a first well region surrounding the absorption region and arranged between the absorption region and the substrate, the first well region being doped with a first polarity; and one or more switches each controlled by a respective control signal, the one or more switches each configured to collect at least a portion of the photo-carriers based on the respective control signal and to provide the portion of the photo-carriers to a respective readout circuit.

ADVANCED COMPUTATIONAL PIXEL IMAGERS WITH MULTIPLE IN-PIXEL COUNTERS

A computational pixel imaging device can include multiple digitizing counters per pixel that can be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down- sampling.

SYSTEMS AND METHODS FOR DIGITAL IMAGING USING COMPUTATIONAL PIXEL IMAGERS WITH MULTIPLE IN-PIXEL COUNTERS

A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

Electrical devices making use of counterdoped junctions

An electrical device includes a counterdoped heterojunction selected from a group consisting of a pn junction or a p-i-n junction. The counterdoped junction includes a first semiconductor doped with one or more n-type primary dopant species and a second semiconductor doped with one or more p-type primary dopant species. The device also includes a first counterdoped component selected from a group consisting of the first semiconductor and the second semiconductor. The first counterdoped component is counterdoped with one or more counterdopant species that have a polarity opposite to the polarity of the primary dopant included in the first counterdoped component. Additionally, a level of the n-type primary dopant, p-type primary dopant, and the one or more counterdopant is selected to the counterdoped heterojunction provides amplification by a phonon assisted mechanism and the amplification has an onset voltage less than 1 V.

COMPUTATIONAL PIXEL IMAGER WITH IN-PIXEL HISTOGRAM ACQUISITION
20220174235 · 2022-06-02 ·

A computational pixel imaging device can include multiple counters per pixel that can be used to acquire in-pixel histogram data representative of a signal detected by a pixels detector. Multiple pixel counters can also be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

SYSTEMS AND METHODS FOR DIGITAL IMAGING USING COMPUTATIONAL PIXEL IMAGERS WITH MULTIPLE IN-PIXEL COUNTERS

A stereo imaging system includes an optical assembly and a computational pixel imager (CPI) having a plurality of pixels. Each pixel includes a light sensor and counters that convert a photocurrent from the light sensor to a digital signal. The optical assembly, which directs light from a light field to the CPI, includes an optical field combiner and first and second primary lens assemblies, which are configured to receive first and second portions of the light from the light field, respectively, and to direct the first and second portions of the light to the optical field combiner. The optical field combiner includes a modulator configured to modulate the first and second portions of the light and to direct modulated first and second portions of the light onto the CPI. The counters are configured to perform digital signal processing on the digital signal.

ADVANCED COMPUTATIONAL PIXEL IMAGERS WITH MULTIPLE IN-PIXEL COUNTERS

A computational pixel imaging device can include multiple digitizing counters per pixel that can be used to execute simultaneous signal-processing threads on acquired image data. The imaging device can also include infinite dynamic range sensing and perform signal down-sampling.

Scheme of boosting adjustable ground level(s) of storage capacitor(s) of BJT pixel circuit(s) in pixel array circuit of image sensor apparatus
11282888 · 2022-03-22 · ·

A bipolar junction transistor (BJT) pixel circuit, including: a BJT transistor, having a base coupled to a photo detector, an emitter coupled to a shutter circuit, and a collector coupled to a reference ground level; the photo detector, having first end coupled to the base of BJT transistor and second end coupled to the reference ground level, for generating base current based on light intensity of light incident on the photo detector; the shutter circuit, coupled to the emitter of the BJT transistor, for controlling exposure time of the photo detector according to a shutter signal; and a storage capacitor, coupled between the shutter circuit and an adjustable ground level different from the reference ground level, for storing image data captured by the photo detector, wherein the adjustable ground level is boosted to be higher than the reference ground level for one or more times during the exposure time.

Multi-beta pixel circuit and image sensor circuit using same

An image sensor uses a pixel circuit which includes a BJT phototransistor having multiple selectable beta values. The BJT is one semiconductor device includes: a substrate having a first conductivity type; a first well having the first conductivity type; a collector electrode having the first conductivity type in the first well; a second well having a first concentration of a second conductivity type; a first emitter electrode having the first conductivity type in the second well; a base electrode having the second conductivity type in the second well; a third well having a second concentration of the second conductivity type, wherein the second concentration is different from the first concentration; and a second emitter electrode having the first conductivity type in the third well.

SCHEME OF BOOSTING ADJUSTABLE GROUND LEVEL(S) OF STORAGE CAPACITOR(S) OF BJT PIXEL CIRCUIT(S) IN PIXEL ARRAY CIRCUIT OF IMAGE SENSOR APPARATUS
20220068993 · 2022-03-03 ·

A bipolar junction transistor (BJT) pixel circuit, including: a BJT transistor, having a base coupled to a photo detector, an emitter coupled to a shutter circuit, and a collector coupled to a reference ground level; the photo detector, having first end coupled to the base of BJT transistor and second end coupled to the reference ground level, for generating base current based on light intensity of light incident on the photo detector; the shutter circuit, coupled to the emitter of the BJT transistor, for controlling exposure time of the photo detector according to a shutter signal; and a storage capacitor, coupled between the shutter circuit and an adjustable ground level different from the reference ground level, for storing image data captured by the photo detector, wherein the adjustable ground level is boosted to be higher than the reference ground level for one or more times during the exposure time.